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935369117557

Description
Multifunction Peripheral
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size2MB,169 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
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935369117557 Overview

Multifunction Peripheral

935369117557 Parametric

Parameter NameAttribute value
MakerNXP
package instruction,
Reach Compliance Codeunknown
Base Number Matches1
NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6SDLAEC
Rev. 9, 11/2018
MCIMX6SxAxxxxxB MCIMX6UxAxxxxxB
MCIMX6SxAxxxxxC MCIMX6UxAxxxxxC
MCIMX6SxAxxxxxD MCIMX6UxAxxxxxD
i.MX 6Solo/6DualLite
Automotive and
Infotainment
Applications Processors
Package Information
Plastic Package
BGA Case 2240 21 x 21 mm, 0.8 mm pitch
Ordering Information
See
Table 1 on page 3
1
Introduction
1
The i.MX 6Solo/6DualLite automotive and infotainment
processors represent the latest achievement in integrated
multimedia-focused products offering high-performance
processing with a high degree of functional integration.
These processors are designed considering the needs of
the growing automotive infotainment, telematics, HMI,
and display-based cluster markets.
The processors feature advanced implementation of
single/dual Arm
®
Cortex
®
-A9 core, which operates at
speeds of up to 1 GHz. They include 2D and 3D graphics
processors, 1080p video processing, and integrated
power management. Each processor provides a 32/64-bit
DDR3/DDR3L/LPDDR2-800 memory interface and a
number of other interfaces for connecting peripherals,
such as WLAN, Bluetooth
®
, GPS, hard drive, displays,
and camera sensors.
2
3
4
5
6
7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.3 Updated Signal Naming Convention . . . . . . . . . . . .9
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
3.1 Special Signal Considerations . . . . . . . . . . . . . . . .21
3.2 Recommended Connections for Unused Analog
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . .23
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . .23
4.2 Power Supplies Requirements and Restrictions . .33
4.3 Integrated LDO Voltage Regulator Parameters . . .34
4.4 PLL’s Electrical Characteristics . . . . . . . . . . . . . . .36
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . .38
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . .39
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . .44
4.8 Output Buffer Impedance Parameters . . . . . . . . . .49
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . .52
4.10 General-Purpose Media Interface (GPMI) Timing .64
4.11 External Peripheral Interface Parameters . . . . . . .72
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . .134
5.1 Boot Mode Configuration Pins . . . . . . . . . . . . . . .134
5.2 Boot Device Interface Allocation . . . . . . . . . . . . .135
Package Information and Contact Assignments . . . . . .136
6.1 Updated Signal Naming Convention . . . . . . . . . .136
6.2 21x21 mm Package Information. . . . . . . . . . . . . .137
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .163
NXP Reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products
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