MC146818A
I
I
Advance
Information
I
CMOS
\
REAL-TIME CLOCK PLUS RAM (RTC)
The MC146818A Real-Time Clock plus RAM is a peripheral device
which includes the unique MOTEL concept for use with various
microprocessors,
microcomputers,
and larger computers. This part
combines three unique features: a complete time-of-day clock with
alarm and one hundred year calendar, a programmable periodic inter-
rupt and square-wave generator, and 50 bytes of low-power static
RAM. The MC146818A uses high-speed CMOS technology to interface
with 1 MHz processor buses, while consuming very little power.
The Real-Time Clock plus RAM has two distinct uses. First, it is
designed as a battery powered CMOS part (in an otherwise NMOS/TTL
system) including all the common battery backed-up functions such as
RAM, time, and calendar. Secondly, the MC146818A maybe used with
a CMOS microprocessor to relieve the software of the timekeeping
,~~
workload and to extend the available RAM of an MPU such as the ., “’~:$
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MC146805E2.
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Low-Power, High-Speed CMOS
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q
Internal Time Base and Oscillator
‘,& Q.%~!*
*>sq,.,,\
,$4:*,
$+.~:;;,
. ..~.
O Counts Seconds, Minutes, and Hours of the Day
“’t:>?,.
q
Counts Days of the Week, Date, Month, and Year
,$:
;<4 ,
..!*:,:
.
q
3 V to 6 V Operation
~t.k
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q
Time Base Input Options: 4.194304 MHz, 1.048ti ,)$ ~~z, or 32.7W
,,,,,M,f,
, ...*<.*$,
,$\<..%.-
kHz
,,:,, .\.,
..i,;t~
q
Time Base Oscillator for Parallel Resonan~$$~{S]s
.~;\l..
.
q
40 to 200 pW Typical Operating Power{,~L:~#~ ‘Frequency Time Base
q
4.0 to 20 mW Typical Operating Po.~%j~*$?gh
q
Binary or BCD Representation
q
12- or 24-Hour Clock with ,$$,> ..?.l
A~$oQ$PM
:,., ,{+<,
.$k,
q
Daylight Savings Time OplWn ‘$
q
Automatic
q
Automatic
Frequency Time Base
,~$.~,,,
~fTW~
Calendar, and Alarm
in 12-Hour Mode
CASE 623
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Leap Y~r ~&&~ensation
PIN ASSIGNMENT
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Ba$W&n’Wotorola and Competitor Bus Timing
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q
Multiplex@:~@
fbr Pin Efficiency
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q
lnterfq&$&%@% Software as 64 RAM Locations
q
Selectable
q
14
B~es:$’~CIOck
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q
~’~~~~$i’of
q
Microprocessor#$@t@mpatible
‘oT
Oscl
0SC2
~vDD
[
2
[ 3
23 ] SQW
22 ] Ps
21 JCKOUT
20 ] CKFS
lg ] l~Q
18 ] RESET
17 ] DS
16 ] STBY
15 ] Rl~
14 ] AS
13 ]=
and Control Registers
General Purpose RAM
.. ~.
.
@x;.$J&%ws indicates Data Integrity
Bit
?{&us Compatible Interrupt Signals (~Q)
..
q
Three Interrupts are Separately Software Maskable and Testable
Time-of-Day Alarm, Once-per-Second to Once-per-Day
Periodic Rates from 30.5 ps to 500 ms
End-of-Clock Update Cycle
Square-Wave Output Signal
q
Clock Output May Be Used as Microprocessor
At Time Base Frequency -1 or +4
q
24-Pin Dual-In-Line
q
Quad Pack
Also
q
Programmable
ADO [ 4
AD1 [ 5
AD2 [ 6
AD3 [ 7
AD4 [ 8
AD5 c g
Clock Input
AD6 [ 10
AD7 [ 11
Vss [ 12
Package
Available
.
hls document contains !ntormatlon on a new product. Specltlcatlons and tntormatlon here!n
are subject to change without notice
)MOTOROLAINC,,
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ADI-1026
FIGURE
1 –
BLOCK
DIAGRAM
+
Clock
output
~
~
CKOUT
CKFS
sow
~Q
RESET
Ps
User RAM
(50 Bytes)
,i,>,~
. ~><.,
~:*.
,*
.*$:, \ h .
. ..
?+
$.;).,,<,:?
v
,’<;}.:
-
MAXIMUM
RATINQ~~(@oJjages
R~$n&
“~:?’
referenced
to
VSS)
Value
–0.3
to +8.0
Unit
Symbol
VDD
Supply
Volta~J**
“ ‘$?
v
v
mA
This device contains circuitry to protect the in-
puts against damage due to high static voltages
or electric fields; however, it is advised that nor-
mal precautions be taken to avoid application of
any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper opera-
tion it is recommended that Vin and Vout be con-
strained to the range VSS =(Vin
or Voutl
s VDD. Reliability of operation is enhanced if
unused inputs are tied to an appropriate logic
voltage level (e. g., either VSS or VDD).
All
Input V:$~&.~xcept
OSC1
Vin
I
V5S– O.5 to VDD+O.5
10
TL to TH
0 to 70
– 40 to 85
–55to
+150
Current ~rai~~r
Pin Excluding
Vmi,a%q,.vs s
Op&~~~&Temperature
‘~%$~6818A
‘<@c146818AC
Storage Temperature
Range
Range
TA
Tstg
Oc
Oc
THERMAL
CHARACTERISTICS
Characteristic
Symbol
I Value
Unit
Thermal Resistance
Plastic
Cerdlp
Ceramic
I
9JA
I 120
I
65
50
“c/w
I
Products Inc.
MOTOROLA
@
Semiconductor
2
—
)C ELECTRICAL CHARACTERISTICS
Frequency of Operation
Output Voltage
lLoad< lOpA
(vD D = 3
Vdc, vs s = O Vdc, TA = Tl to TH unless otherwise noted)
I Symbol I
fosc
vOL
vOH
V; CL (OSC2)= 10 pF
IDD3
IDD4
–
–
50
Min
32.768
—
VDD– O.1
I
Max
32.768
0.1
–
I
Unit
kHz
v
I
Characteristics
IDD – Bus Idle
CL= 15 pF; SOW Disabled, STBY=O.2
CKOUT=fosc,
fosc=32.76B kHz
IDD – Quiescent
fosc= DC; OSC1 = DC;
All Other
lnpUtS=vDD–0.2
NO
Clock
.\,
A&fi%$k
“~
{?.
50
$“’:#$, !,
:,.: ~~.+ i:”
,.~ ,,~
,....
,
. .:s. ‘ .. ~+
i,,..
..,t>.$.
‘:.*$
\k;~#
. ..,. \ ~,
.,+ ..%
i’t” * ,.,/, )$
~-.>,,->,
t +?’+’~’’t;;k~
v
<t
\k*t
?J
~tl,
V;
Output High Voltege
(l Load= – 0.25 mA, All Outputs)
Output Low Voltage
(i Load= 0.25 mA, All
Input High Voltage
OUtpUtS)
vOH
VOL
2.7
Input Low Voltage
Input Current
Three-State
Leakage
~,
——
, %&$$y’
vlH
STBY, ADO-AD7, DS, AS, R/W, CS
.,$,@,q.,
RESET, CKFS, PS, OSC1
‘$:?y$:
~ ~?:,
,,. ‘k$,’w.~’D
MOT
——
vlL ‘?$yvss
ADO-AD7, DS, AS, R/W, CS, CKFS, PS, RESET, OSCI
Vss
MOT .#vj
AS, DS, R/~F ~~:$~
–
——
—
MOT, OSCI, CE, STBY, RESET, CKFS, ,P#
‘$ ‘“
IRQ, AD@@fl~lTsL
–
,,}
$i.,,,,
-$.*;,,’:,: ~
0.3
VDD
VDD
VDD
v
v
0.5
Vss
* 10
*I
* 10
v
PA
WA
Input Current
Three-State
Leakage
.::.
——
— AS, DS, R/~
MOT, OSCI, CE, STBY, RESET, CKFS, PS
1
Iin
ITSL
I
1
—
–
I
,
+10
*1
I
AA
PA
I
1
IRQ, ADO-AD7
I
*IO
m
MOTOROkA
Semiconductor
3
Products Inc.
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