MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MC145149/D
Dual PLL Frequency Synthesizer
Interfaces with Dual–Modulus Prescalers
The MC145149 contains two PLL Frequency Synthesizers which share a
common serial data port and common reference oscillator. The device
contains two 14–stage R counters, two 10–stage N counters, and two
7–stage A counters. All six counters are fully programmable through a serial
port. The divide ratios are latched into the appropriate counter latch
according to the last data bits (control bits) entered.
When combined with external low–pass filters and voltage controlled
oscillators (VCOs), the MC145149 can provide all the remaining functions
for two PLL frequency synthesizers operating up to the device’s frequency
limit. For higher VCO frequency operation, a down mixer or dual–modulus
prescaler can be used between the VCO and the synthesizer IC.
•
•
•
•
•
•
•
•
•
•
Low Power Consumption Through Use of CMOS Technology
Wide Operating Voltage Range: 3 to 9 V
Operating Temperature Range: – 40 to + 85°C
÷
R Range = 3 to 16,383
÷
N Range = 3 to 1023
÷
A Range = 0 to 127
Two “Linearized” Three–State Digital Phase Detectors with No Dead Zone
Two Lock Detect Signals (LD1 and LD2)
Two Open–Drain Port Expander Outputs (SW1 and SW2)
Compatible with the Serial Peripheral Interface (SPI) on CMOS MCUs
20
MC145149
P SUFFIX
PLASTIC DIP
CASE 738
1
20
DW SUFFIX
SOG PACKAGE
CASE 751D
1
ORDERING INFORMATION
MC145149P
Plastic DIP
MC145149DW SOG Package
PIN ASSIGNMENT
LD1
MC1
ENB
fin1
DATA
CLK
fin2
S/Rout
MC2
LD2
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VSS1
PDout1
VDD1
SW1
OSCout
OSCin
SW2
VDD2
PDout2
VSS2
©
Motorola, Inc. 1995
MOTOROLA
MC145149
1
BLOCK DIAGRAM
1–BIT
LATCH
17
SW1
14–BIT SHIFT REGISTER
ENB
3
14
REFERENCE COUNTER LATCH
14
14–BIT
÷
R COUNTER
CONTROL LOGIC
fin1 4
7–BIT
÷
A
COUNTER
7
÷
A COUNTER
LATCH
OSCin 15
OSCout 16
1–BIT
CONTROL
S/R
7
7–BIT S/R
10–BIT
÷
N
COUNTER
10
÷
N COUNTER
LATCH
10
10–BIT S/R
fV
fR
PIN 18 = VDD1
PIN 20 = VSS1
LOCK
DETECT
1
LD1
19
PDout1
PHASE
DETECTOR
2
MODULUS
CONTROL 1
(MC1)
PLL1
PLL2
1–BIT
LATCH
14
SW2
14–BIT SHIFT REGISTER
14
REFERENCE COUNTER LATCH
14
14–BIT
÷
R COUNTER
CONTROL LOGIC
fin2
7
7–BIT
÷
A
COUNTER
7
÷
A COUNTER
LATCH
2–BIT
CONTROL
S/R
1–BIT
CONTROL
S/R
7
7–BIT S/R
10–BIT
÷
N
COUNTER
10
÷
N COUNTER
LATCH
10
10–BIT S/R
fV
fR
PIN 13 = VDD2
PIN 11 = VSS2
LOCK
DETECT
10
LD2
12
PDout2
PHASE
DETECTOR
9
MODULUS
CONTROL 2
(MC2)
8
S/Rout
DATA
CLK
5
6
MC145149
2
MOTOROLA
MAXIMUM RATINGS*
(Voltages Referenced to VSS)
Symbol
VDD
Vin, Vout
Vout
Iin, Iout
IDD, ISS
PD
Tstg
TL
Rating
DC Supply Voltage
Input or Output Voltage (DC or Transient)
except SW1, SW2
Output Voltage (DC or Transient) — SW1,
SW2
Input or Output Current (DC or Transient),
per Pin
Supply Current, VDD or VSS Pins
Power Dissipation, per Package†
Storage Temperature
Lead Temperature (8–Second Soldering)
Value
– 0.5 to + 10
– 0.5 to VDD + 0.5
– 0.5 to 15
±
10
±
30
500
– 65 to + 150
260
Unit
V
V
V
mA
mA
mW
°C
°C
This device contains circuitry to protect
against damage due to high static voltages or
electric fields, however, it is advised that normal
precautions be taken to avoid applications of any
voltage higher than maximum rated voltages to
this high–impedance circuit. For proper opera-
tion, it is recommended that Vin and Vout be
constrained to the range VSS
≤
(Vin or
Vout)
≤
VDD except SW1 and SW2 which may
range up to 15 V.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs should be left floating.
* Maximum Ratings are those values beyond which damage to the device may occur.
†Power Dissipation Temperature Derating:
Plastic DIP: – 12 mW/°C from 65 to 85°C
SOG Package: – 7 mW/°C from 65 to 85°C
ELECTRICAL CHARACTERISTICS
(Voltages Referenced to VSS)
VDD
V
—
0 Level
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
9
9
– 40°C
Min
3
—
—
—
2.95
4.95
8.95
—
—
—
2.1
3.5
6.3
– 0.60
– 0.90
– 1.50
1.30
1.90
3.80
0.80
1.50
3.50
– 0.44
– 0.64
– 1.30
0.44
0.64
1.30
—
—
Max
9
0.05
0.05
0.05
—
—
—
0.9
1.5
2.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
±
0.3
±
50
Min
3
—
—
—
2.95
4.95
8.95
—
—
—
2.1
3.5
6.3
– 0.50
– 0.75
– 1.25
1.10
1.70
3.30
0.48
0.90
2.10
– 0.35
– 0.51
– 1.00
0.35
0.51
1.00
—
—
25°C
Max
9
0.05
0.05
0.05
—
—
—
0.9
1.5
2.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
±
0.1
±
25
Min
3
—
—
—
2.95
4.95
8.95
—
—
—
2.1
3.5
6.3
– 0.30
– 0.50
– 0.80
0.66
1.08
2.10
0.24
0.45
1.50
– 0.22
– 0.36
– 0.70
0.22
0.36
0.70
—
—
85°C
Max
9
0.05
0.05
0.05
—
—
—
0.9
1.5
2.7
—
—
—
mA
Source
—
—
—
—
—
—
mA
Sink
—
—
—
mA
Source
—
—
—
—
—
—
±
1.0
±
22
µA
µA
(continued)
V
U i
Unit
V
V
S b l
Symbol
VDD
VOL
Ch
i i
Characteristic
Power Supply Voltage Range
Output Voltage
Vin = 0 V or VDD
Iout = 0
µA
VOH
1 Level
VIL
Input Voltage
Vout = 0.5 V or VDD – 0.5 V
(All Outputs Except OSCout)
0 Level
VIH
1 Level
IOH
Output Current — MC1, MC2
Vout = 2.7 V
Vout = 4.6 V
Vout = 8.5 V
Vout = 0.3 V
Vout = 0.4 V
Vout = 0.5 V
Output Current — SW1, SW2
Vout = 0.3 V
Vout = 0.4 V
Vout = 0.5 V
Output Current — Other Outputs
Vout = 2.7 V
Vout = 4.6 V
Vout = 8.5 V
Vout = 0.3 V
Vout = 0.4 V
Vout = 0.5 V
Input Current — DATA, CLK, ENB
Input Current — fin, OSCin
IOL
Sink
IOL
IOH
IOL
Sink
Iin
Iin
MOTOROLA
MC145149
3
ELECTRICAL CHARACTERISTICS
(continued)
VDD
V
—
—
3
5
9
9
9
– 40°C
Min
—
—
—
—
—
—
—
Max
10
10
800
1200
1600
±
0.3
0.3
Min
—
—
—
—
—
—
—
25°C
Max
10
10
800
1200
1600
±
0.1
0.1
Min
—
—
—
85°C
Max
10
10
1600
2400
3200
±
3.0
3.0
Unit
U i
pF
pF
µA
Symbol
S b l
Cin
Cout
IDD
Input Capacitance
Characteristic
Ch
i i
Three–State Output Capacitance — PDout
Quiescent Current
Vin = 0 V or VDD
Iout = 0
µA
Three–State Leakage Current — PDout
Vout = 0 V or 9 V
Off–State Leakage Current — SW1, SW2
Vout = 9 V
IOZ
IOZ
—
—
µA
µA
SWITCHING CHARACTERISTICS
(TA = 25°C, CL = 50 pF)
Symbol
tTLH
Characteristic
Output Rise Time, MC1 and MC2
Figure
No.
1, 6
VDD
V
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
3
5
9
Min
—
—
—
—
—
—
—
—
—
—
—
—
30
20
18
70
32
25
12
12
15
5
10
20
—
—
—
40
35
25
Max
115
60
40
60
34
30
140
80
60
125
80
50
—
—
—
—
—
—
—
—
—
—
—
—
5
2
0.5
—
—
—
Unit
ns
tTHL
Output Fall Time, MC1 and MC2
1, 6
ns
tTLH,
tTHL
tPLH,
tPHL
tsu
Output Rise and Fall Time, LD and S/Rout
1, 6
ns
Propagation Delay Time, fin to MC1 or MC2
2, 6
ns
Setup Time, DATA to CLK
3
ns
tsu
Setup Time, CLK to ENB
3
ns
th
Hold Time, CLK to DATA
3
ns
trec
Recovery Time, ENB to CLK
3
ns
tr, tf
Input Rise and Fall Times, Any Input
4
µs
tw
Input Pulse Width, ENB and CLK
5
ns
MC145149
4
MOTOROLA
FREQUENCY CHARACTERISTICS
(Voltages Referenced to VSS, CL = 50 pF, Input tr = tf = 10 ns unless otherwise indicated)
Symbol
S b l
fi
Parameter
P
Input Frequency
(fin, OSCin)
Test C di i
T
Conditions
R
≥
8, A
≥
0, N
≥
8
Vin = 500 mV p–p
ac coupled sine wave
R
≥
8, A
≥
0, N
≥
8
Vin = VDD to VSS
dc coupled square wave
VDD
V
3
5
9
3
5
9
– 40°C
Min
—
—
—
—
—
—
Max
6
15
15
6
15
15
25°C
Min
—
—
—
—
—
—
Max
6
15
15
6
15
15
85°C
Min
—
—
—
—
—
—
Max
6
15
15
6
15
15
Unit
U i
MHz
MHz
SWITCHING WAVEFORMS
VDD
fin
tTLH
ANY
OUTPUT
90%
10%
tTHL
MC
50%
50%
tPLH
tPHL
VSS
Figure 1.
Figure 2.
VDD
DATA
tsu
CLK
50%
50%
VSS
th
VDD
LAST
CLK
tsu
ENB
50%
VSS
PREVIOUS DATA
LATCHED
trec
VDD
FIRST
CLK
tr
VSS
ANY
INPUT
90%
10%
tf
VDD
VSS
Figure 4.
Figure 3.
OUTPUT
tw
ENB, CLK
VDD
50%
VSS
* Includes all probe and fixture capacitance.
DEVICE
UNDER
TEST
CL*
Figure 5.
Figure 6.
MOTOROLA
MC145149
5
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