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DATASHEET
VOLTAGE MONITOR/WATCHDOG TIMER CIRCUIT
General Description:
The 9WDV3501 contains 5 voltage monitoring (VMON)
comparators and a watchdog timer circuit. The external voltage
monitor inputs have a reset threshold of approximately 1.0V.
Various power supplies can easily be monitored with these
inputs by use of a simple resistor ladder to divide the supply rail
down to 1.0V.
There are two RESET# outputs. RESET0# is typically
connected to a microprocessor, while RESET1# is typically
connected to peripheral components.
If any of the VMON inputs drops outside the desired operating
range, both RESET# outputs will be asserted simultaneously.
They will stay low as long as VMON is below the threshold.
After VMON rises above the threshold, RESET0# will begin its
timeout count down and return high after the count down
expires. The count down period depends on the value on the
RST0_DLY(1:0) pins. The minimum value is 50ms and the
maximum value is 300ms. When RESET0# is de-asserted, the
RESET1# output will continue to be asserted for an additional
count down period.
ICS9WDV3501B
The RESET1# count down period is set by the RST1_DLY(1:0)
inputs. The
additional
delay can range from 50ms to 300ms.
This additional reset is designed to hold the peripheral circuits
in reset after the microprocessor has been released from reset.
The VMON circuitry can continue to operate until VDD drops
below 2.3V.
The watchdog timer monitors transitions on the WDI input. This
input is usually driven by a GPIO line from a microprocessor and
is used to detect when the CPU has entered an infinite loop. If a
transition on the WDI input is not detected within the watchdog
time out period, both RESET# outputs will be asserted and will
be as described in the previous paragraph. The watchdog timer
is restarted when RESET1# goes inactive. The watchdog time
out period is selectable using the WTB(1:0) inputs. The
watchdog can be disabled by pulling the WDI_EN pin low.
The 9WDV3501 incorporates a precision RC oscillator that
utilized an external trimming resistor for maximum accuracy.
The recommend value for this resistor is 30KΩ.
The 9WDV3501 is available in both commercial and industrial
temperature ranges. It is available in a 20-pin QFN or a 20-pin
TSSOP package.
Functional Block Diagram
VMON0
+
-
Features:
•
•
•
•
•
5 Precision Voltage Monitors:
Watchdog Timer
Selectable Watchdog and Reset Timing
Two Active Low reset outputs
Precision Timebase with external trim resistor
VMON1
+
-
VMON2
+
-
VMON3
+
-
VMON4
+
-
RST0_DLY(1:0)
1.00V
Bandgap
Reset Timer 0
50 to 300 ms
nominal
Logic
RESET0#
WTB(1:0)
WatchDog
Timer
WDI
Watchdog
Edge Detector
Reset Timer 1
50 to 300 ms
nominal
RESET1#
RST1_DLY(1:0)
Master clock
RP
Osc
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
1468—05/30/08
1
ICS9WDV3501B
Voltage Monitor/Watchdog Timer Circuit
Advance Information
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MLF Pin Configuration
VMON0
VMON1
VMON2
VMON3
VMON4
15
14
13
12
11
GNDA
RST1_SEL1
RST1_SEL0
RST0_SEL1
RST0_SEL0
DESCRIPTION
3.3V Analog Power Supply
Watchdog timout select bit. (MSB)
Watchdog timout select bit. (LSB)
Watchdog Input
Resistor connection for internal oscillator
Ground pin
This input enables or disables the watchdog timer. 0 = Disable, 1 = Enable
RESET 1 output. Low = Reset, High = Normal Operation
RESET 0 output. Low = Reset, High = Normal Operation
3.3V Power Supply
RESET1 timeout period select (LSB)
RESET1 timeout period select (MSB)
RESET1 timeout period select (LSB)
RESET1 timeout period select (MSB)
Analog Ground
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
1568—05/30/08
20
VDDA
WTB1
WTB0
WDI
RP
1
2
3
4
5
6
GND
19
18 17 16
9WDV3501
7
*WDI_EN
8
RESET1#
9 10
RESET0#
VDD
20-pin MLF
pins preceded by '*' have 100kohm internal pull up.
MLF Pin Description
PIN #
(MLF)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
VDDA
WTB1
WTB0
WDI
RP
GND
*WDI_EN
RESET1#
RESET0#
VDD
RST0_SEL0
RST0_SEL1
RST1_SEL0
RST1_SEL1
GNDA
VMON4
VMON3
VMON2
VMON1
VMON0
PIN TYPE
PWR
IN
IN
IN
IN
GND
IN
OUT
OUT
PWR
IN
IN
IN
IN
GND
IN
IN
IN
IN
IN
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
2
ICS9WDV3501B
Voltage Monitor/Watchdog Timer Circuit
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TSSOP Pin Configuration
VMON1
VMON0
VDDA
WTB1
WTB0
WDI
RP
GND
*WDI_EN
RESET1#
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VMON2
VMON3
VMON4
GNDA
RST1_SEL1
RST1_SEL0
RST0_SEL1
RST0_SEL0
VDD
RESET0#
20-pin TSSOP
pins preceded by '*' have 100kohm internal pull up.
TSSOP Pin Description
PIN #
(TSSOP)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
PIN NAME
VMON1
VMON0
VDDA
WTB1
WTB0
WDI
RP
GND
*WDI_EN
RESET1#
RESET0#
VDD
RST0_SEL0
RST0_SEL1
RST1_SEL0
RST1_SEL1
GNDA
VMON4
VMON3
VMON2
PIN TYPE
DESCRIPTION
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
3.3V Analog Power Supply
Watchdog timout select bit. (MSB)
Watchdog timout select bit. (LSB)
Watchdog Input
Resistor connection for internal oscillator
Ground pin
This input enables or disables the watchdog timer. 0 = Disable, 1 = Enable
RESET 1 output. Low = Reset, High = Normal Operation
RESET 0 output. Low = Reset, High = Normal Operation
3.3V Power Supply
RESET1 timeout period select (LSB)
RESET1 timeout period select (MSB)
RESET1 timeout period select (LSB)
RESET1 timeout period select (MSB)
Analog Ground
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
Voltage Monitor Input, nominal 1.0V threshold
PWR
IN
PWR
IN
IN
IN
IN
GND
IN
OUT
OUT
PWR
IN
IN
IN
IN
GND
IN
IN
IN
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
9WDV3501
1568—05/30/08
3
ICS9WDV3501B
Voltage Monitor/Watchdog Timer Circuit
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Selectable WatchDog TimeOut
data latched at power on
WTB1
WTB0
Period (ms)
0
0
1.00
0
1
2.00
1
0
5.00
1
1
10.00
Selectable Reset 0 Assertion Period
data latched at power on
Assertion
RST0_DLY1 RST0_DLY0
(ms)
0
0
50
0
1
100
1
0
200
1
1
300
Selectable Reset 1 Assertion Period
(Period AFTER Reset0 De-Asserts)
data latched at power on
Assertion
RST1_DLY1 RST1_DLY0
(ms)
0
0
50
0
1
100
1
0
200
1
1
300
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
1568—05/30/08
4
ICS9WDV3501B
Voltage Monitor/Watchdog Timer Circuit
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VDD 9WDV3501
Vmon Inputs
Reset 0#
Delay set by RST0_DLY0,1
Reset 1#
Fig 1. Power on Timing
Vmon Inputs
Reset 0#
Delay set by RST0_DLY0,1
Reset 1#
Fig. 2. Vmon Reset Event Timing
Pulses ignored during Reset
WDI
Reset 0#
Reset period set
by RST0_DLY0,1
Reset 1#
Reset period set
by RST1_DLY0,1
Fig. 3. Watch Dog Timer Reset Event Timing
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
1568—05/30/08
5