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ICS501BMILF

Description
Clock Generator, 15MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size97KB,9 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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ICS501BMILF Overview

Clock Generator, 15MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8

ICS501BMILF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOIC
package instructionSOP, SOP8,.25
Contacts8
Reach Compliance Codecompliant
ECCN codeEAR99
Other featuresALSO OPERATES AT 5V SUPPLY
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Humidity sensitivity level1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency15 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP8,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
power supply3.3/5 V
Master clock/crystal nominal frequency7.5 MHz
Certification statusNot Qualified
Maximum seat height1.75 mm
Maximum supply voltage5.25 V
Minimum supply voltage3.14 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
Advance Information
DATASHEET
VOLTAGE MONITOR/WATCHDOG TIMER CIRCUIT
General Description:
The 9WDV3501 contains 5 voltage monitoring (VMON)
comparators and a watchdog timer circuit. The external voltage
monitor inputs have a reset threshold of approximately 1.0V.
Various power supplies can easily be monitored with these
inputs by use of a simple resistor ladder to divide the supply rail
down to 1.0V.
There are two RESET# outputs. RESET0# is typically
connected to a microprocessor, while RESET1# is typically
connected to peripheral components.
If any of the VMON inputs drops outside the desired operating
range, both RESET# outputs will be asserted simultaneously.
They will stay low as long as VMON is below the threshold.
After VMON rises above the threshold, RESET0# will begin its
timeout count down and return high after the count down
expires. The count down period depends on the value on the
RST0_DLY(1:0) pins. The minimum value is 50ms and the
maximum value is 300ms. When RESET0# is de-asserted, the
RESET1# output will continue to be asserted for an additional
count down period.
ICS9WDV3501B
The RESET1# count down period is set by the RST1_DLY(1:0)
inputs. The
additional
delay can range from 50ms to 300ms.
This additional reset is designed to hold the peripheral circuits
in reset after the microprocessor has been released from reset.
The VMON circuitry can continue to operate until VDD drops
below 2.3V.
The watchdog timer monitors transitions on the WDI input. This
input is usually driven by a GPIO line from a microprocessor and
is used to detect when the CPU has entered an infinite loop. If a
transition on the WDI input is not detected within the watchdog
time out period, both RESET# outputs will be asserted and will
be as described in the previous paragraph. The watchdog timer
is restarted when RESET1# goes inactive. The watchdog time
out period is selectable using the WTB(1:0) inputs. The
watchdog can be disabled by pulling the WDI_EN pin low.
The 9WDV3501 incorporates a precision RC oscillator that
utilized an external trimming resistor for maximum accuracy.
The recommend value for this resistor is 30KΩ.
The 9WDV3501 is available in both commercial and industrial
temperature ranges. It is available in a 20-pin QFN or a 20-pin
TSSOP package.
Functional Block Diagram
VMON0
+
-
Features:
5 Precision Voltage Monitors:
Watchdog Timer
Selectable Watchdog and Reset Timing
Two Active Low reset outputs
Precision Timebase with external trim resistor
VMON1
+
-
VMON2
+
-
VMON3
+
-
VMON4
+
-
RST0_DLY(1:0)
1.00V
Bandgap
Reset Timer 0
50 to 300 ms
nominal
Logic
RESET0#
WTB(1:0)
WatchDog
Timer
WDI
Watchdog
Edge Detector
Reset Timer 1
50 to 300 ms
nominal
RESET1#
RST1_DLY(1:0)
Master clock
RP
Osc
IDT
TM
/ICS
TM
Voltage Monitor/Watchdog Timer Circuit
1468—05/30/08
1

ICS501BMILF Related Products

ICS501BMILF ICS501BMILFT
Description Clock Generator, 15MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8 Clock Generator, 15MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8
Is it lead-free? Lead free Lead free
Is it Rohs certified? conform to conform to
Parts packaging code SOIC SOIC
package instruction SOP, SOP8,.25 SOP, SOP8,.25
Contacts 8 8
Reach Compliance Code compliant compliant
ECCN code EAR99 EAR99
Other features ALSO OPERATES AT 5V SUPPLY ALSO OPERATES AT 5V SUPPLY
JESD-30 code R-PDSO-G8 R-PDSO-G8
JESD-609 code e3 e3
length 4.9 mm 4.9 mm
Humidity sensitivity level 1 1
Number of terminals 8 8
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 15 MHz 15 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP
Encapsulate equivalent code SOP8,.25 SOP8,.25
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Celsius) 260 260
power supply 3.3/5 V 3.3/5 V
Master clock/crystal nominal frequency 7.5 MHz 7.5 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1.75 mm 1.75 mm
Maximum supply voltage 5.25 V 5.25 V
Minimum supply voltage 3.14 V 3.14 V
Nominal supply voltage 5 V 5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed
Terminal form GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 3.9 mm 3.9 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1

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