531MB1057M00BGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531MB1057M00BGR

531MB1057M00BGR: DescriptionLVPECL Output Clock Oscillator, 1057MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size268KB，15 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531MB1057M00BGR Overview

LVPECL Output Clock Oscillator, 1057MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531MB1057M00BGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1057 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.0 7/06

Si530/531

Recommended Resources

Wiring schematic diagram of a factory's secondary low-voltage power distribution panel

Variable channel tuning filter and equivalent circuita

Power supply coupler-thyristor interface circuit b

Incandescent lamp life extension circuit 2

High voltage flyback converter circuit diagram using LT1307

±5～25V bipolar regulated power supply circuit

To be strangled in the cradle, or to break out of the cocoon?: In May 2006, Shanghai Qingyue Software Co., Ltd. officially launched the research and development of the PCB software Qingyuefeng, and it began to be sold on the market in October 2008. It is only 3 o...; winnies PCB Design

Why is my program behaving like this?: I am using S3C44B0 to do an LED light experiment (cycle lighting), and debugging in AXD is successful. Then I burned the .AXF file into the board using FlashProgrammer, and found that after unplugging...; 2315862 Embedded System

Please tell me the specific steps to port ucosII/gui to pc through vc++: I have little experience in this area and have no idea. Please give me some advice....; 吃吃吃包子 DSP and ARM Processors

6410 NK operation and USB download issues?: I have made a 6410 board myself. The current situation is as follows: In the BSP provided by Samsung, NK has three speeds, the first is 532MHz, 133MHz, 66.5MHz, the second is 600MHz, 150MHz, 75MHz, an...; wangyurui Embedded System

Problems in PCB design: I would like to ask what does Ground plane removed under Vin- mean in this picture? Does it mean that V- should be separated when laying ground in PCB design? Why should it be separated?...; 星星brisk PCB Design

Mechanical gadgets made by amateurs: In response to customer needs, we have changed from working on embedded systems to working on mechanics. Electronic engineers must also develop in an all-round way. The picture above shows the work, h...; youyou_123 DIY/Open Source Hardware

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components