5962F9565501VRC datasheet, PDF

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5962F9565501VRC: DescriptionAC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20; Categorylogic logic; File Size90KB，10 Pages; ManufacturerRenesas Electronics Corporation; Websitehttps://www.renesas.com/

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5962F9565501VRC Overview

AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20

5962F9565501VRC Parametric

Parameter Name	Attribute value
Parts packaging code	DIP
package instruction	DIP, DIP20,.3
Contacts	20
Reach Compliance Code	unknown
series	AC
JESD-30 code	R-CDIP-T20
JESD-609 code	e4
Load capacitance (CL)	50 pF
Logic integrated circuit type	BUS DRIVER
MaximumI(ol)	0.008 A
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	20
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Prop。Delay @ Nom-Sup	16 ns
propagation delay (tpd)	18 ns
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
total dose	300k Rad(Si) V
width	7.62 mm
Base Number Matches	1

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ACS373MS

April 1995

Radiation Hardened

Octal Transparent Latch, Three-State

Pinouts

20 LEAD CERAMIC DUAL-IN-LINE

MIL-STD-1835 DESIGNATOR, CDIP2-T20, LEAD FINISH C

TOP VIEW

20 VCC

19 Q7

18 D7

17 D6

16 Q6

15 Q5

14 D5

13 D4

12 Q4

11 LE

Features

• 1.25 Micron Radiation Hardened SOS CMOS

• Total Dose 300K RAD (Si)

• Single Event Upset (SEU) Immunity

<1 x 10

-10

Errors/Bit-Day (Typ)

• SEU LET Threshold >80 MEV-cm

/mg

• Dose Rate Upset >10

RAD (Si)/s, 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55

C to +125

• Signiﬁcant Power Reduction Compared to ALSTTL Logic

• DC Operating Voltage Range: 4.5V to 5.5V

• Input Logic Levels

- VIL = 30% of VCC Max

- VIH = 70% of VCC Min

• Input Current

≤1µA

at VOL, VOH

GND 10

20 LEAD CERAMIC FLATPACK

MIL-STD-1835 DESIGNATOR, CDFP4-F20, LEAD FINISH C

TOP VIEW

GND

VCC

Description

The Intersil ACS373MS is a radiation hardened octal transparent

latch with three-state outputs. The outputs are transparent to the

inputs when the latch enable (LE) is high. When the LE goes low,

the data is latched. When the Output Enable (OE) is high, the

outputs are in the high impedance state. The latch operation is

independent of the state of the output enable.

The ACS373MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of the

radiation hardened, high-speed, CMOS/SOS Logic Family.

Ordering Information

PART NUMBER

ACS373DMSR

ACS373KMSR

ACS373D/Sample

ACS373K/Sample

ACS373HMSR

TEMPERATURE RANGE

-55

C to +125

-55 C to +125 C

+25

SCREENING LEVEL

Intersil Class S Equivalent

Sample

Die

PACKAGE

20 Lead SBDIP

20 Lead Ceramic Flatpack

20 Lead SBDIP

20 Lead Ceramic Flatpack

Die

Truth Table

NOTE:

L = Low Voltage Level

H = High Voltage Level

X = Don’t Care

Z = High Impedance State

Functional Diagram

1 OF 8

(3, 4, 7, 8, 13,

14, 17, 18)

COMMON

CONTROLS

(11)

(1)

LATCH

(2, 5, 6, 9, 12,

15, 16, 19)

I = Low voltage level one set-up time prior to the high to low latch enable transition

h = High voltage level one set-up time prior to the high to low latch enable transition

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Spec Number

518799

File Number

3999

5962F9565501VRC Related Products

	5962F9565501VRC	5962F9565501VXC
Description	AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDIP20, CERAMIC, DIP-20	AC SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20
Parts packaging code	DIP	DFP
package instruction	DIP, DIP20,.3	DFP, FL20,.3
Contacts	20	20
Reach Compliance Code	unknown	unknown
series	AC	AC
JESD-30 code	R-CDIP-T20	R-CDFP-F20
JESD-609 code	e4	e4
Load capacitance (CL)	50 pF	50 pF
Logic integrated circuit type	BUS DRIVER	BUS DRIVER
MaximumI(ol)	0.008 A	0.008 A
Number of digits	8	8
Number of functions	1	1
Number of ports	2	2
Number of terminals	20	20
Maximum operating temperature	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE
Output polarity	TRUE	TRUE
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	DFP
Encapsulate equivalent code	DIP20,.3	FL20,.3
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK
power supply	5 V	5 V
Prop。Delay @ Nom-Sup	16 ns	16 ns
propagation delay (tpd)	18 ns	18 ns
Certification status	Not Qualified	Not Qualified
Filter level	MIL-PRF-38535 Class V	MIL-PRF-38535 Class V
Maximum seat height	5.08 mm	2.92 mm
Maximum supply voltage (Vsup)	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	NO	YES
technology	CMOS	CMOS
Temperature level	MILITARY	MILITARY
Terminal surface	GOLD	GOLD
Terminal form	THROUGH-HOLE	FLAT
Terminal pitch	2.54 mm	1.27 mm
Terminal location	DUAL	DUAL
total dose	300k Rad(Si) V	300k Rad(Si) V
width	7.62 mm	6.92 mm
Base Number Matches	1	1

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