IDT71258L35C datasheet, PDF - EEWORLD Datasheet

IDT71258L35C: DescriptionStandard SRAM, 64KX4, 35ns, CMOS, CDIP24, 0.300 INCH, SIDE BRAZED, DIP-24; Categorystorage storage; File Size204KB，9 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT71258L35C Overview

Standard SRAM, 64KX4, 35ns, CMOS, CDIP24, 0.300 INCH, SIDE BRAZED, DIP-24

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	IDT (Integrated Device Technology)
Parts packaging code	DIP
package instruction	DIP,
Contacts	24
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	35 ns
JESD-30 code	R-CDIP-T24
JESD-609 code	e0
length	30.607 mm
memory density	262144 bit
Memory IC Type	STANDARD SRAM
memory width	4
Number of functions	1
Number of ports	1
Number of terminals	24
word count	65536 words
character code	64000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	64KX4
Output characteristics	3-STATE
Exportable	NO
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	225
Certification status	Not Qualified
Maximum seat height	5.08 mm
Minimum standby current	2 V
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	TIN LEAD
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	7.62 mm
Base Number Matches	1

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