IS62WV10248EFBLL-45BLI datasheet, PDF

Datasheet> All Categories > storage> storage> IS62WV10248EFBLL-45BLI

IS62WV10248EFBLL-45BLI: DescriptionStandard SRAM, 1MX8, 45ns, CMOS, PBGA48, MINIBGA-48; Categorystorage storage; File Size851KB，17 Pages; ManufacturerIntegrated Silicon Solution ( ISSI )

Download Datasheet Parametric View All

IS62WV10248EFBLL-45BLI Overview

Standard SRAM, 1MX8, 45ns, CMOS, PBGA48, MINIBGA-48

IS62WV10248EFBLL-45BLI Parametric

Parameter Name	Attribute value
Maker	Integrated Silicon Solution ( ISSI )
package instruction	VFBGA,
Reach Compliance Code	unknown
Maximum access time	45 ns
JESD-30 code	R-PBGA-B48
length	8 mm
memory density	8388608 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	48
word count	1048576 words
character code	1000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	1MX8
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
Maximum seat height	1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.2 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	BALL
Terminal pitch	0.75 mm
Terminal location	BOTTOM
width	6 mm
Base Number Matches	1

Preview

Download Datasheet

View All

IS62WV10248EFALL/BLL

IS65WV10248EFALL/BLL

1Mx8 LOW VOLTAGE,

ULTRA LOW POWER CMOS STATIC RAM

KEY FEATURES



High-speed access time: 45ns, 55ns



CMOS low power operation

– Operating Current: 36mA (max.)

– CMOS standby Current: 5.8uA (typ.)



TTL compatible interface levels

Single power supply

–1.65V-2.2V V

(IS62/65WV10248EFALL)

– 2.2V-3.6V V

(IS62/65WV10248EFBLL)



Optional ERR1/ERR2 pin:

ERR1: indicates 1-bit error detection and

correction.

ERR2: indicates 2-bit error detection



Three state outputs

Industrial and Automotive temperature support

Lead-free available

JANUARY 2017

DESCRIPTION

The

ISSI

IS62/65WV10248EFALL/BLL are high-speed,

8M bit static RAMs organized as 1M words by 8 bits. It

is fabricated using

ISSI's

high-performance CMOS

technology and implemented ECC function to improve

reliability. This highly reliable process coupled with

innovative circuit design techniques including ECC,

yields high-performance and low power consumption

devices.

This highly reliable process coupled with innovative circuit

design techniques including ECC (SEC-DEC Single Error

Correcting-Double Error Detecting), yields high performan-

ce and low power consumption devices.

When CS1# is HIGH (deselected) or when CS2 is LOW

(deselected) or when CS1# is LOW, CS2 is HIGH, the

device assumes a standby mode at which the power

dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable

and Output Enable inputs. The active LOW Write Enable

(WE#) controls both writing and reading of the memory.

The IS62/65WV10248EFALL/BLL are packaged in the

JEDEC standard 48-pin mini BGA (6mm x 8mm) and

44-pin TSOP (TYPE II)



FUNCTIONAL BLOCK DIAGRAM

A0 – A19

DECODER

Memory

Array

1024Kx8

ECC

Array

512Kx4

VDD

VSS

ERR1

ERR2

I/O0 – I/O7

I/O

DATA

CIRCUIT

ECC

COLUMN I/O

Column I/O

CS1#

CS2

OE#

WE#

CONTROL

CIRCUIT

without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to

obtain the latest version of this device specification before relying on any published information and before placing orders for products.

Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can

reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such

applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:

a.) the risk of injury or damage has been minimized;

b.) the user assume all such risks; and

c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances

Integrated Silicon Solution, Inc.-

www.issi.com

Rev. 0A

11/01/2016

Recommended Resources

Using 14-bit 125MSPS four-channel ADC circuit diagram

Radio remote control doorbell circuit a

Practical amplifier circuit consisting of operational amplifier LM386 e

Simple electronic code su circuit

Phase sequence test pen circuit diagram

555 motorcycle DC ignition circuit

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components