54LS54DM datasheet, PDF - EEWORLD Datasheet

54LS54DM: DescriptionIC,LOGIC GATE,2/2/3/3IN AND-NOR,LS-TTL,DIP,14PIN,CERAMIC; Categorylogic logic; File Size247KB，6 Pages; ManufacturerNational Semiconductor（TI ）; Websitehttp://www.ti.com

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54LS54DM Overview

IC,LOGIC GATE,2/2/3/3IN AND-NOR,LS-TTL,DIP,14PIN,CERAMIC

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	National Semiconductor（TI ）
Reach Compliance Code	unknown
JESD-30 code	R-XDIP-T14
JESD-609 code	e0
Logic integrated circuit type	AND-OR-INVERT GATE
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
power supply	5 V
Certification status	Not Qualified
Schmitt trigger	NO
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Base Number Matches	1

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