935325577557 datasheet, PDF - EEWORLD Datasheet

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935325577557: DescriptionMultifunction Peripheral; CategoryThe embedded processor and controller Microcontrollers and processors; File Size811KB，74 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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Multifunction Peripheral

935325577557 Parametric

Parameter Name	Attribute value
Maker	NXP
package instruction	,
Reach Compliance Code	unknown
Base Number Matches	1

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NXP Semiconductors

Data Sheet: Technical Data

Document Number: IMX28CEC

Rev. 4,

10/2018

i.MX28

i.MX28 Applications

Processors for Consumer

Products

Package Information

Plastic package

Case MAPBGA-289, 14 x 14 mm, 0.8 mm pitch

Ordering Information

See

Table on page 3

for ordering information.

Introduction

The i.MX28 is a low-power, high-performance

applications processor optimized for the general

embedded industrial and consumer markets. The core of

the i.MX28 is NXP's fast, power-efficient

implementation of the ARM926EJ-S™ core, with

speeds of up to 454 MHz.

The device is suitable for a wide range of applications,

including the following:

• Human-machine interface (HMI) panels:

industrial, home

• Industrial drive, PLC, I/O control display, factory

robotics display, graphical remote controls

• Handheld scanners and printers

• Patient-monitoring, portable medical devices

• Smart energy meters, energy gateways

• Media phones, media gateways

The integrated power management unit (PMU) on the

i.MX28 is composed of a triple output DC-DC switching

converter and multiple linear regulators. These provide

NXP reserves the right to change the detail specifications as may be required

to permit improvements in the design of its products.

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Device Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

1.2 Ordering Information and Functional

Part Differences

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Special Signal Considerations. . . . . . . . . . . . . . . . 11

Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 11

3.1 i.MX28 Device-Level Conditions . . . . . . . . . . . . . . 11

3.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . 18

3.3 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 19

3.4 I/O AC Timing and Parameters . . . . . . . . . . . . . . . 22

3.5 Module Timing and Electrical Parameters. . . . . . . 27

Package Information and Contact Assignments . . . . . . . 59

4.1 Case MAPBGA-289, 14 x 14 mm, 0.8 mm Pitch. . 59

4.2 Ground, Power, Sense, and Reference Contact

Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

4.3 Signal Contact Assignments . . . . . . . . . . . . . . . . . 61

4.4 i.MX280 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 63

4.5 i.MX283 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 65

4.6 i.MX286 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 67

4.7 i.MX287 Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . 69

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Introduction

power sequencing for the device and its I/O peripherals such as memories and SD cards, as well as provide

battery charging capability for Li-Ion batteries.

The i.MX28 processor includes an additional 128-Kbyte on-chip SRAM to make the device ideal for

eliminating external RAM in applications with small footprint RTOS.

The i.MX28 supports connections to various types of external memories, such as mobile DDR, DDR2 and

LV-DDR2, SLC and MLC NAND Flash.

The i.MX28 can be connected to a variety of external devices such as high-speed USB2.0 OTG, CAN,

10/100 Ethernet, and SD/SDIO/MMC.

1.1

Device Features

The following lists the features of the i.MX28:

• ARM926EJ-S CPU running at 454 MHz:

— 16-Kbyte instruction cache and 32-Kbyte data cache

— Arm embedded trace macrocell (CoreSight™ ETM9™)

— Parallel JTAG interface

• 128 KBytes of integrated low-power on-chip SRAM

• 128 KBytes of integrated mask-programmable on-chip ROM

• 1280 bits of on-chip one-time-programmable (OCOTP) ROM

• 16-bit mobile DDR (mDDR) (1.8 V), DDR2 (1.8 V) and LV-DDR2 (1.5 V), up to 205 MHz DDR

clock frequency with voltage overdrive

• Support for up to eight NAND Flash memory devices with up to 20-bit BCH ECC

• Four synchronous serial ports (SSP) for SDIO/MMC/MS/SPI: SSP0, SSP1, SSP2, and SSP3. SSP0

and SSP1 can support three modes,1-bit, 4-bit, and 8-bit, whereas SSP2 and SSP3 can support only

1-bit and 4-bit modes.

• 10/100-Mbps Ethernet MAC compatible with IEEE Std 802.3™:

— Single 10/100 Ethernet with GMII/RMII or Dual 10/100 Ethernet with RMII interface

— Supporting IEEE Std 1588™-compatible hardware timestamp

— Supporting 50-MHz/25-MHz clock output for external Ethernet PHY

• Two 2.0B protocol-compatible Controller Area Network (CAN) interfaces

• One USB2.0 OTG device/host controller and PHY

• One USB2.0 host controller and PHY

• LCD controller, up to 24-bit RGB (DOTCK) modes and 24-bit system-mode

• Pixel-processing pipeline (PXP) supports full path from color-space conversion, scaling,

alpha-blending to rotation without intermediate memory access.

• SPDIF transmitter

• Dual serial audio interface (SAIF) to support full-duplex transmit and receive operations; each

SAIF supports three stereo pairs

i.MX28 Applications Processors for Consumer Products, Rev. 4,

10/2018

NXP Semiconductors

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