Features
•
•
•
•
Gain Control in 20-dB Steps
Very Low I/Q Amplitude and Phase Errors
High Input P1dB
Small and Optimized Package for High Reliability and Performance
Applications
•
Infrastructure Digital Communication Systems
•
GSM/Cellular Transceivers
•
ISM Band Transceivers
Benefits
•
Fully Integrated Device with Reduced External Component Count
65 - 300 MHz
SiGe IF
Receiver/
Demodulator
ATR0797
Electrostatic sensitive device.
Observe precautions for handling.
Description
The ATR0797 is a multi-purpose demodulator RFIC. The silicon monolithic integrated
circuit is designed with Atmel’s advanced SiGe technology. This demodulator is capa-
ble of both quadrature demodulation or direct IF output. Features include switchable
gain control on a frequency range from 65 MHz to 300 MHz. The device performs a
very low amplitude as well as phase error and allows high input P1dB. The ATR0797
targets a variety of system applications for communications including 3G wireless.
Figure 1.
Block Diagram
GC1
5
GC2
4
2
1
BBIP
BBIN
IFP
IFN
8
9
ϕ
16
15
13 12
BBQP
BBQN
LOP
LON
Rev. 4665D–SIGE–08/04
Pin Configuration
Figure 2.
Pinning
BBIN
BBIP
VCC
GC2
GC1
GND
VCC
IFP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BBQP
BBQN
VCC
LOP
LON
GND
VCC
IFN
Pin Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
BBIN
BBIP
VCC
GC2
GC1
GND
VCC
IFP
IFN
VCC
GND
LON
LOP
VCC
BBQN
BBQP
Function
Baseband I-axis negative output, self biasing
Baseband I-axis positive output, self biasing
5 V power supply
Gain control input, stage 2, 5 V CMOS levels
Gain control input, stage 1, 5 V CMOS levels
Ground
5 V power supply
IF positive input, self biasing, AC-coupled
IF negative input, self biasing, AC-coupled
5 V power supply
Ground
Local oscillator, negative input, self biasing, AC-coupled
Local oscillator, positive input, self biasing, AC-coupled
5 V power supply
Baseband Q-axis negative output, self biasing
Baseband Q-axis positive output, self biasing
2
ATR0797
4665D–SIGE–08/04
ATR0797
Product Description
Atmel’s ATR0797 is a variable gain I-Q demodulator designed for use in receiver IF sec-
tions, that are typically existing in superheterodyne RF architectures.
The ATR0797 has two gain stages that are independent of each other. These gain
stages are broadband differential amplifiers each with a digital control pin to set the
gain. Since the amplifiers have approximately the same gain, setting GC1 high and GC2
low results in approximately the same gain as setting GC1 low and GC2 high. Former
setting offers better noise figures.
The IF input is a differential input that has internal bias circuitry to set the common mode
voltage. The use of blocking capacitors to facilitate AC coupling is highly recommended
to avoid changing the common mode voltage. Either input may be driven single ended if
the other input is connected to ground through an AC short such as a 1000 pF capacitor.
This typically results in slightly lower input P1dB.
The two matched mixers are configured with the quadrature LO generator to provide in-
phase and quadrature baseband outputs.
The LO and IF ports offer a differential 50
Ω
impedance. The passives at these ports
(parallel L-R network) and the package itself adds inductance that tends to degrade
return loss.
The ATR0797 features immunity from changes in LO power. The gain features change
by less than 0.6 dB over a 6 dB range of LO power. Also note the excellent I/Q balance,
which typically falls within 0.1 dB and 1 degree from 65 MHz to 300 MHz, and varies
less than 0.05 dB and 0.5 degree over temperature (-40°C to +85°C).
The frequency response of the IF and LO ports is dominated by the L-R network on the
input. When de-embedded, the gain and P1dB response is within 0.5 dB from 65 MHz to
300 MHz.
The figures in the datasheet illustrate a typical ATR0797’s performance with respect to
temperature. Note that these numbers include the effect of the R-L network in the IF
port.
Evaluation board design and equipment constraints:
Please take into account that the evaluation board uses baluns on the I/Q outputs, and
these baluns limit the low frequency response of the device. For true baseband opera-
tion, the baluns should be removed, and the differential signals used directly.
The 27 pF capacitor on the evaluation board is appropriate for lower frequencies.
3
4665D–SIGE–08/04
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
All voltages are referred to GND.
Parameters
Supply voltage
LO input
IF input
Operating temperature
Storage temperature
Note:
Symbol
V
CC
LOP, LON
IFN, IFP
T
OP
T
stg
Value
5.5
10
10
-40 to +85
-65 to +150
Unit
V
dBm
V
°C
°C
The device may not survive all maximums applied simultaneously.
Thermal Resistance
Parameters
Junction ambient
Symbol
R
thJA
Value
35
Unit
K/W
Electrical Characteristics
Test conditions: V
CC
= 5 V, T
amb
= 25°C, LO input: 0 dBm at 200 MHz
IF input: at 200.1 MHz, GC1 = 0, GC2 = 0; 0 dBm
IF input: at 200.1 MHz, GC1 = 1, GC2 = 0; -20 dBm
IF input: at 200.1 MHz, GC1 = 1, GC2 = 1; -40 dBm
No.
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.9
Notes:
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
120 -
220
20
2
32
-29
35
-27
11
12
-8
15
-6
14.5
17
38
Max.
Unit
Type
(1)
IF Input (I/Q Mixing to Baseband)
Frequency range
IF input return loss
IF input common
mode voltage
Gain
Input P1dB
DSB Noise figure
Gain
Input P1dB
DSB Noise figure
Gain set = medium;
GC1 = 1; GC2 = 0 or
GC1 = 0; GC2 = 1
Gain set = high;
GC1 = GC2 = 1
50
Ω
nominal
differential input
(2)
Internally generated
8-9
8-9
8, 9
2-1,
16-15
1, 2,
15, 16
2-1,
16-15
2-1,
16-15
1, 2,
15, 16
2-1,
16-15
f
RL
V
CH
G
P1dB
NF
G
P1dB
NF
65
300
MHz
dB
V
dB
dBm
dB
dB
dBm
dB
A
C
D
A
C
D
B
D
1. Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
2. The parasitic inductance of the package, the board, and L5, L6 must be matched out at the center frequency with a series
capacitor to achieve 20 dB of port match.
3. The parasitic inductance of the package must be matched out to reach 20 dB port match above 100 MHz.
4
ATR0797
4665D–SIGE–08/04
ATR0797
Electrical Characteristics (Continued)
Test conditions: V
CC
= 5 V, T
amb
= 25°C, LO input: 0 dBm at 200 MHz
IF input: at 200.1 MHz, GC1 = 0, GC2 = 0; 0 dBm
IF input: at 200.1 MHz, GC1 = 1, GC2 = 0; -20 dBm
IF input: at 200.1 MHz, GC1 = 1, GC2 = 1; -40 dBm
No.
1.10
1.11
1.12
2
2.1
2.2
2.3
2.4
2.5
2.6
3
3.1
3.2
3.3
4
4.1
4.2
4.3
4.4
4.5
Notes:
Parameters
Gain
Input P1dB
DSB Noise figure
I/Q Output
I/Q output frequency
range
I/Q output amplitude
error
I/Q phase error
I/Q output common
mode voltage
I/Q output differential
offset voltage
I/Q output return loss
LO input
LO input level
Return loss
LO frequency range
Miscellaneous
Supply voltage
Supply current
GC1, GC2 logic level
low
GC1, GC2 logic level
high
GC1, GC2 input
impedance
3, 7,
10, 14
3, 7,
10, 14
4, 5
4, 5
4, 5
V
CC
I
CC
V
IL
V
IH
Z
0
0.7
×
V
CC
40
4.75
5
195
0.3
×
V
CC
V
CC
5.25
V
mA
V
V
kΩ
A
A
D
D
D
13-12
13-12
13-12
P
LO
RL
LO
RL
LO
65
-3
0
20
300
+3
dBm
dB
MHz
D
D
D
50
Ω
nominal
differential output
(3)
1, 2,
15, 16
2-1,
16-15
2-1,
16-15
1, 2,
15, 16
2-1,
16-15
1, 2,
15, 16
V
offset
RL
I/Q
-100
20
f
I/Q
DC
-0.2
-2
2.5
+100
500
+0.2
+2
MHz
dB
deg
V
mV
dB
D
A
A
A
A
D
Gain set = low;
GC1 = GC2 = 0
Test Conditions
Pin
2-1,
16-15
1, 2,
15, 16
2-1,
16-15
Symbol
G
P1dB
NF
Min.
-7
12
Typ.
-4
14
31
Max.
-2
Unit
dB
dBm
dB
Type
(1)
A
C
D
1. Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
2. The parasitic inductance of the package, the board, and L5, L6 must be matched out at the center frequency with a series
capacitor to achieve 20 dB of port match.
3. The parasitic inductance of the package must be matched out to reach 20 dB port match above 100 MHz.
5
4665D–SIGE–08/04
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