DPS512C32MKV3-20B datasheet, PDF

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DPS512C32MKV3-20B: DescriptionSRAM Module, 512KX32, 20ns, CMOS, 1.190 X 1.190 INCH, 0.250 INCH HEIGHT, HERMETIC SEALED, CERAMIC, MODULE, SLCC, PGA-66; Categorystorage storage; File Size654KB，6 Pages; ManufacturerB&B Electronics Manufacturing Company

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DPS512C32MKV3-20B Overview

SRAM Module, 512KX32, 20ns, CMOS, 1.190 X 1.190 INCH, 0.250 INCH HEIGHT, HERMETIC SEALED, CERAMIC, MODULE, SLCC, PGA-66

DPS512C32MKV3-20B Parametric

Parameter Name	Attribute value
Maker	B&B Electronics Manufacturing Company
Parts packaging code	PGA
package instruction	APGA,
Contacts	66
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Maximum access time	20 ns
Other features	CONFIGURABLE AS 2M X 8
Spare memory width	16
JESD-30 code	S-XPGA-P66
memory density	16777216 bit
Memory IC Type	SRAM MODULE
memory width	32
Number of functions	1
Number of terminals	66
word count	524288 words
character code	512000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	512KX32
Package body material	UNSPECIFIED
encapsulated code	APGA
Package shape	SQUARE
Package form	GRID ARRAY, PIGGYBACK
Parallel/Serial	PARALLEL
Certification status	Not Qualified
Maximum seat height	6.35 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Base Number Matches	1

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2Mx8/1Mx16/512Kx32, 20 - 45ns, PGA

30A141-02

16 Megabit High Speed CMOS SRAM

DPS512C32MKV3

DESCRIPTION:

The DPS512C32MKV3 ‘’VERSA-STACK’’ module is a

revolutionary new high speed memory subsystem using

Dense-Pac Microsystems’ ceramic Stackable Leadless Chip

Carriers (SLCC) mounted on a co-fired ceramic substrate. It

offers 16 Megabits of SRAM in a package envelope of 1.190

x 1.190 x 0.250 inches.

The DPS512C32MKV3 contains four individual 512K x 8

SRAMs, packaged in their own hermetically sealed SLCCs

making the module suitable for commercial, industrial and

military applications.

By using SLCCs, the ‘’Versa-Stack’’ family of modules offers

a higher board density of memory than available with

conventional through-hole, surface mount, module, or

hybrid techniques.

FEATURES:

•

Organizations Available:

512K x 32, 1 Meg x 16,

or 2 Meg x 8

•

Access Times:

20, 25, 35, 45ns

•

Fully Static Operation

- No clock or refresh required

•

Low Power Dissipation

•

Single +5V Power Supply,

±10%

Tolerance

•

TTL Compatible

•

Common Data Inputs and Outputs

•

Low Data Retention Current

•

66-Pin PGA Special ‘’VERSA-STACK’’

Package with Compatable Footprint

FUNCTIONAL BLOCK DIAGRAM

PIN-OUT DIAGRAM

PIN NAMES

A0 - A18

I/O0 - I/O31

CE0 - CE3

WE0 - WE3

N.C.

Address Inputs

Data Input/Output

Low Chip Enables

Write Enables

Output Enable

Power (+5V)

Ground

No Connect

30A141-02

REV. D

This document contains information on a product that is currently released

to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the

right to change products or specifications herein without prior notice.

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