531DB484M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531DB484M000DGR

531DB484M000DGR: DescriptionCMOS/TTL Output Clock Oscillator, 484MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531DB484M000DGR Overview

CMOS/TTL Output Clock Oscillator, 484MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531DB484M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	484 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

AD power supply circuit design experience, worth collecting

Internal functional block diagram of HIP6302 chip

One of the foot pedal spot welding machine circuits

Spot welding machine control circuit

solar oscillating electricity

Computer motherboard circuit diagram 820 2_06

Do I need a hardware foundation to learn embedded programming?: I am a sophomore in the School of Software. Next semester, I will be choosing a major, including WEB and embedded systems. I want to choose embedded systems, but I am afraid that it requires hardware ...; xuesong999 Embedded System

Agilent's Liu Bin: The next decade will be the decade of mobile broadband: Introduction: Last week, on December 21, the Agilent Test and Measurement Conference was held as scheduled. The theme of this conference was "Following the Pace of Technological Development". It was f...; 思潇 Test/Measurement

How to configure the port multiplexing function of Stellaris series processors: [size=4][font=微软雅黑, 宋体] Most Stellaris microcontrollers offer more than one layout and pinout for peripheral modules. Multiplexing of GPIO signal pins also opens up many possibilities for system desig...; Jacktang DSP and ARM Processors

Angry things (those who reply seriously will be rewarded with big gold coins): I wasn't supposed to go online today as I was reviewing for tomorrow's exam, but my mom called me during my nap and I couldn't sleep.A friend of my neighbor who I grew up with is getting a divorce. My...; 鑫海宝贝 Talking

STM8 total interrupt problem: I am using STM8S208RB chip. During use, after the STM8 general interrupt is turned off, it still enters TIMER 1 capture interrupt and TIMER4 timing interrupt (I don't know about other interrupts).The ...; ageless stm32/stm8

USB printer driver related issues: Dear seniors: My company wants to improve a printer whose interface is USB. We hope to use the original driver of this printer and intercept the printing instructions sent by this driver, and forward ...; tianhao Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components