PRELIMINARY
DS1075 Custom
EconOscillator/Divider
www.dalsemi.com
FEATURES
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§
§
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Dual Fixed frequency outputs (30 kHz - 100 MHz)
No external components
0.5% Initial tolerance
1% variation over temperature and voltage
Single 5V supply
Power-down mode
Synchronous output gating
OUT1
OUT0
V
CC
GND
1
2
3
4
8
7
6
5
NC
NC
OE
PDN
DS1075Z 150-MIL SOIC
DS1075M 300-MIL DIP
DESCRIPTION
The DS1075 Custom is a fixed frequency oscillator requiring no external components for operation.
Numerous operating frequencies are possible in the range 29.2 kHz to 100 MHz through the use of an on-
chip factory-programmable prescaler and divider.
The DS1075 Custom is shipped from the factory pre-programmed on a custom basis to the customers
specified output frequency and mode of operation. The part is branded according to the device’s master
frequency (see DS1075 data sheet). The customer fills out a “1075 Custom Order Form” with the
required information and submits it to the factory for approval.
Custom EconOscillators are available in two versions, Simple Custom and Complex Custom, that can be
programmed at the factory in sample and volume quantities.
Simple Custom parts are based on one of the standard master frequencies of 60, 66, 80 and 100 MHz with
non-standard values programmed for the dividers and function select bits. An impressive number (over
1500) of sub-frequencies can be programmed using a Simple Custom part.
Complex Custom parts have a non-standard Master frequency (within the 60 MHz to 110 MHz range)
programmed into the internal master oscillator and non-standard values are programmed for the dividers
and function select bits. Virtually any frequency within the 29.24 kHz to 110 MHz range is possible
using complex custom parts Contact the factory for Custom Part selection and ordering information.
The DS1075 Custom is available in 8-pin DIP or SOIC packages, allowing the generation of a clock
signal easily, economically and using minimal board area.
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091399
DS1075
BLOCK DIAGRAM
Figure 1
Master
Oscillator
60-110MHz
Prescaler
Divide by M
1, 2, 4
OUT0
(Optional)
(Reference)
Power
Down
Control
Divider
Divide by N
1-513
OUT1
PDN
OE
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DS1075
1075 Custom Order Form
Use this form for
DS1075 Custom programmed EconOscillators .
All sections must be completed.
Refer to the datasheet or contact Bob Brown at (972) 371-3719 for assistance.
Parent Part Number:
DS1075
Customer Name: _______________________________________________________________
Customer Contact: _____________________________________________________________
Customer Address: _____________________________________________________________
_____________________________________________________________________________
Customer Phone: (Area) _____
_____
________
Salesman: ____________________________________________________________________
Sales Representative: ___________________________________________________________
Distributor (if any): ____________________________________________________________
Package:
300mil 8-pin DIP
150mil 8-pin SOIC (circle one)
Standard
or
Custom
(circle one)
(60,66,80 or 100MHz)
Enabled - Frequency _________
(Equals master frequency/M)
(Equals master frequency/MN)
Divider (N): _________
Parent Device:
DS ________________
( part will be branded with this speed)
Master Frequency: _________ MHz
Reference Output:
Disabled
Output Frequency: _________
Prescaler (M) :
_________
Special Instructions (Tape & Reel, etc.):
_____________________________________________________________________________
_____________________________________________________________________________
_____________________________________________________________________________
_____________________________________________________________________________
_____________________________________________________________________________
Customer Signature: _____________________________________
(acknowledges acceptance of custom settings)
Fax the completed form to Bob Brown at (972) 371-3717
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DS1075
PIN DESCRIPTIONS
Output Pin (OUT1 pin):
This pin is the main oscillator output, with a frequency determined by clock
reference, M and N dividers.
Output Enable Function (OE pin):
The DS1075 Custom features a “synchronous” output enable.
When OE is at a high logic level the oscillator free runs. When this pin is taken low OUT/ is held low,
immediately if OUT/ is already low, or at the next high-to-low transition if OUT/ is high. This prevents
any possible truncation of the output pulse width when the enable is used. While the output is disabled
the master oscillator continues to run (producing an output at OUT0, if the
EN0
bit = 0) but the internal
counters (/N) are reset. This results in a constant phase relationship between OE’s return to a high level
and the resulting OUT/ signal. When the enable is released OUT/ will make its first transition within one
to two clock periods of the master clock.
Power-Down (
PDN
pin):
A low logic level on this pin can be used to make the device stop oscillating
(active low) and go into a reduced power consumption state. Internal “Enabling Sequencer” circuitry
will first disable OUT in the same way as when OE is used. Next OUT0 will be disabled in a similar
fashion. Finally the oscillator circuitry will be disabled. In this mode both outputs will go into a high
impedance state. The power consumption in the power-down state is much less than if OE is used
because the internal oscillator is completely powered down. Consequently the device will take
considerably longer to recover (i.e., achieve stable oscillation) from a power-down condition than if the
OE is used.
Reference Output (OUT0 pin):
A reference output, OUT0, is also available from the output of the
prescaler. OUT0 is unaffected by the OE pin, but is disabled in a glitchless fashion if the device is
powered down. If this output is not required it can be permanently disabled and there will be a
corresponding reduction in overall power consumption. The availability of this output and its frequency
are specified on the custom order form.
OPERATION OF OUTPUT ENABLE
Since the output enable and internal master oscillator are asynchronous there is the possibility of timing
difficulties in the application. To minimize these difficulties the DS1075 features an “enabling
sequencer” to produce predictable results when the device is enabled and disabled. In particular the
output gating is configured so that truncated output pulses can never be produced.
ENABLE TIMING
The output enable function is produced by sampling the OE input with the output from the pre-scaler mux
(MCLK) and gating this with the output from the programmable divider. The exact behavior of the
device is therefore dependent on the setup time (t
SU
) from a transition on the OE input to the rising edge
of MCLK. If the actual setup time is less than t
SUEM
then one more complete cycle of MCLK will be
required to complete the enable or disable operation (see diagrams). This is unlikely to be of any
consequence in most applications, and then only if the value for N is small. In general, the output will
make its first positive transition between approximately one and two clock periods of MCLK after the
rising edge of OE. (Figure 2)
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DS1075
Figure 2
Disable Timing
If OE goes low while OUT1 is high, the output will be disabled on the completion of the output pulse. If
OUT1 is low, the disabling behavior will be dependent on the setup time between the falling edge of OE
and the rising edge of MCLK. If t
SU
< t
SUEM
the result will be one additional pulse appearing on the
output before disabling occurs.
If the device is in divide-by-one mode, the disabling occurs slightly differently. In this case if t
S
> t
SUEM
one additional output pulse will appear, if t
SU
< t
SUEM
then two additional output pulses will appear. The
following diagrams illustrate the timing in each of these cases. (Figure 3 and 4)
Figure 3
Figure 4
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Microcontroller MCU
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