Hitachi Single-Chip Microcomputer
H8/3318
H8/3318
HD6473318, HD6433318
Hardware Manual
ADE-602-097A
Rev. 2.0
9/3/99
Hitachi, Ltd.
Cautions
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Preface
The H8/3318 comprises high-performance microcontrollers with a fast H8/300 CPU core and a set
of on-chip supporting functions optimized for embedded control. These include ROM, RAM,
three types of timers, a programmable timing pattern controller, data transfer unit (with 256-byte
DPRAM function), parallel buffer interface, serial communication interface, A/D converter, I/O
ports, and other functions needed in control system configurations, so that compact, high-
performance systems can be implemented easily. The H8/3318 includes the H8/3318, with 60-
kbyte ROM and 4-kbyte RAM.
A ZTAT™ (Zero Turn Around Time) version of the H8/3318 is also available, with user-
programmable PROM, providing a quick and flexible response under all sorts of production
conditions, even for applications with frequently-changing specifications.
This manual describes the hardware of the H8/3318. Refer to the
H8/300 Series Programming
Manual
for a detailed description of the instruction set.
Contents
Section 1
1.1
1.2
1.3
Overview
............................................................................................................
Overview ............................................................................................................................
Block Diagram....................................................................................................................
Pin Assignments and Functions..........................................................................................
1.3.1 Pin Arrangement ...................................................................................................
1.3.2 Pin Assignments in Each Operating Mode ...........................................................
1.3.3 Pin Functions.........................................................................................................
1
1
5
6
6
8
12
Section 2
2.1
CPU
...................................................................................................................... 19
19
19
20
20
21
21
21
22
23
24
25
26
26
28
32
34
36
37
38
40
45
47
48
50
50
51
51
52
52
52
i
2.2
2.3
2.4
2.5
2.6
2.7
Overview ............................................................................................................................
2.1.1 Features .................................................................................................................
2.1.2 Address Space .......................................................................................................
2.1.3 Register Configuration ..........................................................................................
Register Descriptions..........................................................................................................
2.2.1 General Registers ..................................................................................................
2.2.2 Control Registers...................................................................................................
2.2.3 Initial Register Values ...........................................................................................
Data Formats ......................................................................................................................
2.3.1 Data Formats in General Registers........................................................................
2.3.2 Memory Data Formats ..........................................................................................
Addressing Modes..............................................................................................................
2.4.1 Addressing Mode ..................................................................................................
2.4.2 Calculation of Effective Address ..........................................................................
Instruction Set ....................................................................................................................
2.5.1 Data Transfer Instructions .....................................................................................
2.5.2 Arithmetic Operations ...........................................................................................
2.5.3 Logic Operations ...................................................................................................
2.5.4 Shift Operations ....................................................................................................
2.5.5 Bit Manipulations..................................................................................................
2.5.6 Branching Instructions ..........................................................................................
2.5.7 System Control Instructions..................................................................................
2.5.8 Block Data Transfer Instruction............................................................................
CPU States..........................................................................................................................
2.6.1 Overview ...............................................................................................................
2.6.2 Program Execution State .......................................................................................
2.6.3 Exception-Handling State......................................................................................
2.6.4 Power-Down State ................................................................................................
Access Timing and Bus Cycle............................................................................................
2.7.1 Access to On-Chip Memory (RAM and ROM)....................................................