54F114DM datasheet, PDF - EEWORLD Datasheet

54F114DM: DescriptionJ-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, CERAMIC, DIP-14; Categorylogic logic; File Size63KB，3 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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54F114DM Overview

J-K Flip-Flop, F/FAST Series, 1-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP14, CERAMIC, DIP-14

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	unknown
Other features	WITH INDIVIDUAL SET INPUTS
series	F/FAST
JESD-30 code	R-GDIP-T14
JESD-609 code	e0
length	19.43 mm
Logic integrated circuit type	J-K FLIP-FLOP
Number of digits	2
Number of functions	1
Number of terminals	14
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output polarity	COMPLEMENTARY
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
propagation delay (tpd)	7.5 ns
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	NEGATIVE EDGE
width	7.62 mm
minfmax	125 MHz
Base Number Matches	1

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