FUJITSU MICROELECTRONICS
DATA SHEET
DS04–27267–1E
ASSP for Power Management Applications of
LCD Panel
4ch System Power Management IC for
LCD Panel
MB39C313
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DESCRIPTION
The MB39C313 is a 4ch system power management IC. It consists of 2-ch DC/DC Converter and 2-ch
Charge pump. The DC/DC converter has excellent line regulation with the feed-forward method. Moreover,
SW FET and phase compensator (Buck) is included, so that BOM can be reduced. It is most suitable for
large size LCD panel power supply.
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FEATURES
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Power supply voltage range: 8 V to 14 V
For Buck Converter included SW FET (Vlogic): output 1.8 V to 3.3 V 1.5 A Max
For Boost Converter included SW FET (Vs): output 18.1 V Max 1.5 A Max (at 12 V input and 15 V output)
Negative Charge Pump with output voltage feedback (VGL): 50 mA Max
Positive Charge Pump with output voltage feedback (VGH): 50 mA Max
Error Amp threshold voltage: 1.213 V
±
1.5 % (Vlogic), 1.146 V
±
0.9 % (Vs),0 V
±
36 mV (VGL),
1.213 V
±
2.1 % (VGH)
Built-in soft-start circuit independent of loads
Excellent line regulation by the feed-forward method (Vlogic, Vs)
Built-in phase compensator parts (Vlogic)
Built-in sequence comparator for rising
Built-in short circuit protection (Vlogic)
Built-in over voltage protection (Vs)
Built-in over current protection (Vlogic, Vs)
Built-in over temperature protection
Frequency setting by input pin: 500 kHz / 750 kHz
Package: TSSOP-28 Exposed PAD
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APPLICATIONS
TFT LCD panels for LCD TV sets and monitors.
Copyright©2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.8
MB39C313
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PIN DESCRIPTIONS
Block
Vlogic
(Buck Converter)
Pin No. Pin name
15
17
18
1
2
28
Vs
(Boost Converter)
4
5
3
27
VGL
(Negative Charge Pump)
VGH
(Positive Charge Pump)
11
13
10
14
16
9
Control
12
25
26
22
20
21
8
Power
24
6
7
23
19
FBB
BOOT
SWB
FB
COMP
SS
SW
SW
OS
GD
DRN
FBN
DRP
FBP
EN1
EN2
FREQ
DLY1
DLY2
AVIN
VINB
VINB
SUP
REF
PGND
PGND
GND
NC
I/O
I
⎯
O
I
O
⎯
I
O
O
O
I
O
I
I
I
I
⎯
⎯
⎯
⎯
⎯
O
⎯
⎯
⎯
Descriptions
Vlogic Error Amp input pin
Boot strap capacitor connection pin
Vlogic inductor connection pin
Vs Error Amp input pin
Vs Error Amp output pin
Vs Soft-start capacitor connection pin
Vs Inductor connection pin
Vs Synchronous rectifier FET output pin
Vs External SW drive output pin
(NMOS open drain output)
VGL external flying capacitor connection pin
VGL Error Amp input pin
VGL external flying capacitor connection pin
VGH Error Amp input pin
Vlogic, VGL control pin
Vs, VGH control pin
Frequency set pin “L”: 500 kHz,“H”: 750 kHz
VGL start time setting capacitor connection pin
Vs, VGH start time setting capacitor connection pin
Power supply pin
Vlogic Power supply pin
VGH Power supply pin
Reference voltage output pin
Drive block ground pin
Ground pin
Non connection pin
DS04–27267–1E
3
MB39C313
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I/O PIN EQUIVALENT CIRCUIT DIAGRAM
<Error Amplifier (Boost Converter)>
Internal
Supply
(4.0 V)
<Soft-start (Boost Converter)>
Internal
Supply
(4.0 V)
SS
FB
1
28
GND
<Power-good (Boost Converter)>
OS
(19.8 V max.)
GND
<Error Amplifier Output for Compensation (Boost Converter)>
GD
Internal
Supply
(4.0 V)
27
GND
<Delay Control (Common)>
Internal
Supply
(4.0 V)
COMP
2
DLY2
26
GND
GND
<Output Sense (Boost Converter)>
3
OS
(19.8 V max.)
<Delay Control (Common)>
Internal
Supply
(4.0 V)
DLY1
25
PGND
GND
(Continued)
4
DS04–27267–1E
MB39C313
<Switching Output (Boost Converter)>
OS
(19.8 V max.)
<Reference Voltage (Common)>
Internal
Supply
(4.0 V)
SW
4
5
REF
24
PGND
<Power supply (Positive Charge Pump)>
SUP
(19.8 V max.)
8
GND
<Power supply>
AVIN
22
PGND
<Enable Control (Common)>
AVIN
GND
<Power supply (Buck Converter)>
VINB
20
21
EN2
9
GND
GND
<Switching Output (Positive Charge Pump)>
SUP
(19.8 V max.)
<Switching Output (Buck Converter)>
VINB
DRP
10
SWB
18
PGND
(Continued)
DS04–27267–1E
5