a
FEATURES
Low Offset Voltage: 50 V max
Low Noise Voltage at 100 Hz, 1 mA: 1.0 nV/√Hz max
High Gain (h
FE
): 500 min at I
C
= 1 mA
300 min at I
C
= 1 A
Excellent Log Conformance: r
BE
0.3
Low Offset Voltage Drift: 0.1 V/ C max
Improved Direct Replacement for LM194/394
Available in Die Form
Low Noise, Matched
Dual Monolithic Transistor
MAT02
PIN CONNECTION
TO-78
(H Suffix)
NOTE
Substrate is connected to case on TO-78 package. Sub-
strate is normally connected to the most negative circuit
potential, but can be floated.
PRODUCT DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
1
The design of the MAT02 series of NPN dual monolithic tran-
sistors is optimized for very low noise, low drift, and low r
BE
.
Precision Monolithics’ exclusive Silicon Nitride “Triple-
Passivation” process stabilizes the critical device parameters
over wide ranges of temperature and elapsed time. Also, the high
current gain (h
FE
) of the MAT02 is maintained over a wide
range of collector current. Exceptional characteristics of the
MAT02 include offset voltage of 50
µV
max (A/E grades) and
150
µV
max F grade. Device performance is specified over the
full military temperature range as well as at 25°C.
Input protection diodes are provided across the emitter-base
junctions to prevent degradation of the device characteristics
due to reverse-biased emitter current. The substrate is clamped
to the most negative emitter by the parasitic isolation junction
created by the protection diodes. This results in complete isola-
tion between the transistors.
The MAT02 should be used in any application where low noise
is a priority. The MAT02 can be used as an input stage to make
an amplifier with noise voltage of less than 1.0 nV/√Hz at 100 Hz.
Other applications, such as log/antilog circuits, may use the ex-
cellent logging conformity of the MAT02. Typical bulk resis-
tance is only 0.3
Ω
to 0.4
Ω.
The MAT02 electrical charac-
teristics approach those of an ideal transistor when operated over
a collector current range of 1
µA
to 10 mA. For applications re-
quiring multiple devices see MAT04 Quad Matched Transistor
data sheet.
Collector-Base Voltage (BV
CBO
) . . . . . . . . . . . . . . . . . . . . 40 V
Collector-Emitter Voltage (BV
CEO
) . . . . . . . . . . . . . . . . . . 40 V
Collector-Collector Voltage (BV
CC
) . . . . . . . . . . . . . . . . . . 40 V
Emitter-Emitter Voltage (BV
EE
) . . . . . . . . . . . . . . . . . . . . . 40 V
Collector Current (I
C
) . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Emitter Current (I
E
) . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Total Power Dissipation
Case Temperature
≤
40°C
2
. . . . . . . . . . . . . . . . . . . . . 1.8 W
Ambient Temperature
≤
70°C
3
. . . . . . . . . . . . . . . . 500 mW
Operating Temperature Range
MAT02A . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
MAT02E, F . . . . . . . . . . . . . . . . . . . . . . . . . –25°C to +85°C
Operating Junction Temperature . . . . . . . . . . –55°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . . +300°C
Junction Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
NOTES
1
Absolute maximum ratings apply to both DICE and packaged devices.
2
Rating applies to applications using heat sinking to control case temperature.
Derate linearly at 16.4 mW/°C for case temperature above 40°C.
3
Rating applies to applications not using a heat sinking; devices in free air only.
Derate linearly at 6.3 mW/°C for ambient temperature above 70°C.
ORDERING GUIDE
1
Model
MAT02AH
2
MAT02EH
MAT02FH
V
OS
max
Temperature
(T
A
= +25 C) Range
50
µV
50
µV
150
µV
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package
Option
TO-78
TO-78
TO-78
NOTES
1
Burn-in is available on commercial and industrial temperature range parts in
TO-can packages.
2
For devices processed in total compliance to MIL-STD-883, add /883 after part
number. Consult factory for 883 data sheet.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
MAT02
WAFER TEST LIMITS
(@ 25 C for V
Parameter
CB
= 15 V and I
C
= 10 A, unless otherwise noted.)
Conditions
MAT02N
Limits
Units
Symbol
Breakdown Voltage
Offset Voltage
Input Offset Current
Input Bias Current
Current Gain
Current Gain Match
Offset Voltage
Change vs. V
CB
Offset Voltage Change
vs. Collector Current
Bulk Resistance
Collector Saturation Voltage
BV
CEO
V
OS
I
OS
I
B
h
FE
∆h
FE
∆V
OS
/∆V
CB
∆V
OS
/∆I
C
r
BE
V
CE (SAT)
10
µA ≤
I
C
≤
1 mA
1
V
CB
= 0 V
I
C
= 1 mA, V
CB
= 0 V
I
C
= 10
µA,
V
CB
= 0 V
10
µA ≤
I
C
≤
1 mA, V
CB
= 0 V
0 V
≤
V
CB
≤
40 V
10
µA ≤
I
C
≤
1 mA
1
V
CB
= 0
10
µA ≤
I
C
≤
1 mA
1
100
µA ≤
I
C
≤
10 mA
I
C
= 1 mA
I
B
= 100
µA
40
150
1.2
34
400
300
4
50
50
0.5
0.2
V min
µV
max
nA max
nA max
min
% max
µV
max
µV
max
Ω
max
V max
NOTES
1
Measured at l
C
= 10
µA
and guaranteed by design over the specified range of I
C
.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
TYPICAL ELECTRICAL CHARACTERISTICS
(V
Parameter
Symbol
CB
= 15 V, I
C
= 10 A, T
A
= +25 C, unless otherwise noted.)
MAT02N
Limits
Units
Conditions
Average Offset
Voltage Drift
Average Offset
Current Drift
Gain-Bandwidth
Product
Offset Current Change vs. V
CB
TCV
OS
TCI
OS
f
T
∆I
OS
/∆V
CB
10
µA ≤
I
C
≤
1 mA
0
≤
V
CB
≤
V
MAX
I
C
= 10
µA
V
CE
= 10 V, I
C
= 10 mA
0
≤
V
CB
≤
40 V
0.08
40
200
70
µV/°C
pA/°C
MHz
pA/V
DICE CHARACTERISTICS
1. COLLECTOR (1)
2. BASE (1)
3. EMITTER (1)
4. COLLECTOR (2)
5. BASE (2)
6. EMITTER (2)
7. SUBSTRATE
Die Size 0.061
×
0.057 inch, 3,477 sq. mils
(1.549
×
1.448 mm, 224 sq. mm)
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the MAT02 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. C
Microcontroller MCU
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