Factory Prog. 6 Output PECL TCXO
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CARDINAL COMPONENTS
Full Custom Multi-Frequency Programmable Osc
Reduced EMI by turning off unused output
Factory Programmable
Differential PECL Output
Industry-standard packaging saves on board space
Mult. outputs 1 pkg vs. mult. osc & assoc. comp.
Performs well under all conditions
Applications
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High-end multimedia
Communications
Industrial
A/D converters
Consumer Applications
Low tolerance applications
Low-power applications
Series
CCT6E
Part Numbering Example: CCT6E 1A 200.0 - 150.0 / 125.0 / 100.0 / 12.0
CCT6E
SERIES
1A
200
150
125
100
12
PACKAGE STYLE FREQUENCY P/P-
1A=14 pin dip
100-400 MHz PECL
9=9.6x11.4 SMD
FREQUENCY A
0.2 - 200 MHz
FREQUENCY B FREQUENCY C FREQUENCY R
0.2 - 200 MHz
0.2 - 200 MHz
Specifications:
Frequency Range:
Output PECL +
Output PECL -
Output A CMOS
Output B CMOS
Output C CMOS
Output R Fixed
Available Stability Options:
Supply Voltage:
Operating Temperature
Range Options:
Storage Temperature:
Duty Cycle:
Start-Up Time:
Aging (PPM/1st Year):
Ta=25C, Vdd=3.3V
Static Discharge Voltage
Mil-Std 883, method 3015
Output Load: *
CMOS, < 40 MHz
CMOS, > 40 MHz
Output Level:
Packaging:
Min
100
100
0.2
0.2
0.2
Typ
Max
400
400
200
200
200
Unit
MHz
MHz
MHz
MHz
MHz
MHz
ppm
V
°C
12
-2.5
3.135
-40
3.3
2.5
3.465
85
-55
40
45
3
125
60
55
10
±1
°C
%
%
mS
ppm
2000
V
30
15
PCEL/CMOS
25 / Tube
Tape & Reel
pF
pF
14 pin
SMD
Notes: Recommended .01
µF
bypass capacitor from Vcc to GND. Capacitor should be as close to oscillator as possible.
* LV PECL outputs require an external termination network
155 Route 46 West
Wayne, NJ 07470
Rev:
M-090414-14
Cardinal Components, Inc.
M-88
TEL:
(973)785-1333
E-MAIL: sales@cardinalxtal.com
WEB: http://www.cardinalxtal.com
Factory Prog. 6 Output PECL TCXO
Electrical Characteristics
D
ESCRIPTION
Ioh
Iol
Vih
Vil
Iih
Iil
Ioz
Idd
Output High Current
Output Low Current
High Level Input Voltage
Low-Level Input Voltage
Input High Current
Input Low Current
Output Leakage Current
Total Power Supply Current
CARDINAL COMPONENTS
Series
CCT6E
C
ONDITIONS
Voh = (L)Vdd - 0.5, (L)Vdd = 3.3 V
Vol = .5, (L)Vdd = 3.3 V
CMOS levels, % of Vdd
CMOS levels, % of Vdd
Vin = AVdd - 0.3 V
Vin = + 0.3 V
tri-state outputs
Example 1:
1 PECL output @155.52 MHz
1 CMOS output @19.44 MHz
1 CMOS output @38.88 MHz
1 CMOS output @77.76 MHz
1 CMOS output @12 MHz
Example 2:
1 PECL output @400 MHz
1 CMOS output @106.25 MHz
1 CMOS output @200 MHz
1 CMOS output @100 MHz
1 CMOS output @12 MHz
Shutdown active
M
IN
12
12
0.7
T
YP
24
24
M
AX
U
NIT
mA
mA
V
0.3
<1
<1
10
10
10
29
V
µA
µA
µA
mA
59
mA
Idds
Shutdown Power Supply Curr
5
20
µA
Output Clock Switching Characteristics
D
ESCRIPTION
1/t1
t3
t4
t5
t6
v7
Output Frequency
Rising Edge Slew Rate
Falling Edge Slew Rate
Output tri-state timing
after SD/OE switches
Clock Jitter
measured at Vdd/2
P+/P- Crossing Point
C
ONDITIONS
Clock output limit, CMOS, Commercial
Clock output limit, PECL, Commercial
Output clock rise time, 20% – 80% Vdd
Output clock fall time, 20% – 80% Vdd
Time for output to enter/leave tri-state mode
Peak-to-Peak period jitter, CLK outputs
Crossing point ref. to Vdd/2, bal res. net
M
IN
0.2
100
0.75
0.75
T
YP
M
AX
200
400
U
NIT
MHz
MHz
nS
nS
1.4
1.4
150
200
300
nS
pS
-0.2
0
0.2
V
155 Route 46 West
Wayne, NJ 07470
Rev:
M-090414-14
Cardinal Components, Inc.
M-89
TEL:
(973)785-1333
E-MAIL: sales@cardinalxtal.com
WEB: http://www.cardinalxtal.com
CARDINAL COMPONENTS
Series
TEST CIRCUIT
AV
DD
0.1 F
CLK out
C
LOAD
V
DD
CCT6E
(L)V
DD
0.1 F
P+/P- out
GND
ALL OUTPUTS, DUTY CYCLE, RISE/FALL TIME
t
1
t
2
OUTPUT
t
3
t
4
OUTPUT 3-STATE TIMING
OE
t
5
ALL
THREE-STATE
OUTPUTS
CLK OUTPUT JITTER
t
5
t
6
CLK
OUTPUT
P+/P- CROSSING POINT AND JITTER
P-
v
7
V
DD
/2
P+
t
8
155 Route 46 West
Wayne, NJ 07470
Rev:
M-090414-14
Cardinal Components, Inc.
M-90
TEL:
(973)785-1333
E-MAIL: sales@cardinalxtal.com
WEB: http://www.cardinalxtal.com
CARDINAL COMPONENTS
DIP
PIN FUNCTION
PIN 1 OE (CONNECT TO VDD)
PIN 2 SUSPEND (CONNECT TO GND)
PIN 3 VDD
PIN 4 CLK C OUTPUT
PIN 5 CONNECT TO PIN 6
PIN 6 CONNECT TO PIN 5
PIN 7 GND
PIN 8 12 MHz REF CLOCK OUTPUT
PIN 9 PECL - OUTPUT
PIN10 PECL + OUTPUT
PIN 11 FACTORY USE (MAKE NO CONNECTION)
PIN 12 FACTORY USE (MAKE NO CONNECTION)
PIN 13 CLK A OUTPUT
PIN 14 CLK B OUTPUT
SMD
PIN FUNCTION
PIN 1 FACTORY USE (MAKE NO CONNECTION)
PIN 2 OE
PIN 3 VDD
PIN 4 CLK C OUTPUT
PIN 5 CONNECT TO PIN 6
PIN 6 CONNECT TO PIN 5
PIN 7 GND
PIN 8 12 MHz REF CLOCK OUTPUT
PIN 9 PECL - OUTPUT
PIN10 PECL + OUTPUT
PIN 11 FACTORY USE (MAKE NO CONNECTION)
PIN 12 FACTORY USE (MAKE NO CONNECTION)
PIN 13 CLK A OUTPUT
PIN 14 CLK B OUTPUT
Dimensions in mm
Recommended solder pad layout
Note1:
For proper operation pin 5 must be connected to pin 6
155 Route 46 West
Wayne, NJ 07470
Rev:
M-090414-14
Cardinal Components, Inc.
M-91
TEL:
(973)785-1333
E-MAIL: sales@cardinalxtal.com
WEB: http://www.cardinalxtal.com
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