5962-9550801MXC datasheet, PDF

5962-9550801MXC: DescriptionField Programmable Gate Array, 848 CLBs, 6000 Gates, 85MHz, CMOS, CPGA207, CERAMIC, PGA-207; CategoryProgrammable logic devices Programmable logic; File Size2MB，82 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

Download Datasheet Parametric View All

5962-9550801MXC Overview

Field Programmable Gate Array, 848 CLBs, 6000 Gates, 85MHz, CMOS, CPGA207, CERAMIC, PGA-207

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
package instruction	PGA,
Reach Compliance Code	compliant
ECCN code	3A001.A.2.C
Other features	MAX 168 I/OS
maximum clock frequency	85 MHz
Combined latency of CLB-Max	3.5 ns
JESD-30 code	S-CPGA-P207
JESD-609 code	e4
length	44.958 mm
Configurable number of logic blocks	848
Equivalent number of gates	6000
Number of terminals	207
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	848 CLBS, 6000 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	3.429 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	44.958 mm
Base Number Matches	1

Help with marketing computer system hardware design issues: Hardware structure design for a marketing computer system of a supply and marketing company Background information: A large supply and marketing company decided to build a computer supply and marketin...; x123 Embedded System

Application information sharing of Hetai HT46R47: [size=9pt][font=Verdana]HT46R47[/font][/size][font=宋体][size=9pt]High performance[/size][/font][size=9pt][font=Verdana]8 [/font][/size] [font=宋体][size=9pt]bit[/size][/font][size=9pt][font=Verdana]OTP[/...; qwertyuiop11111 MCU

(Repost) How do you evaluate Microsoft's large-scale deployment of FPGAs in its data centers?: Editor's Note: This article is written by Li Bojie, an intern at Microsoft Research Asia, on Zhihu in response to the question "How do you evaluate Microsoft's use of FPGAs instead of traditional CPUs...; 白丁 FPGA/CPLD

Summary of ADI system solutions in the first half of 2016: [i=s] This post was last edited by Rubin Khan on 2016-7-11 19:57 [/i] [align=left][b][color=#0000ff][url=https://ezchina.analog.com/thread/13585]https://ezchina.analog.com/thread/13585[/url][/color][/...; 鲁宾汗 Analog electronics

Communication problem between multiple microcontrollers: A 5 series 430 microcontroller is selected as the host, and the slaves include PIC microcontroller and 430 G2553 microcontroller. The communication protocol is MODBUS protocol. Three PIC slaves are hu...; ruiwang Microcontroller MCU

Help~ Can anyone help me see how to remove the blue line?: I have never seen this way of pressing the wires onto the PCB board. As a newbie, how do I remove them?...; xjy201 Power technology

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components