3GDF62F-80N-FREQ datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 3GDF62F-80N-FREQ

3GDF62F-80N-FREQ: DescriptionLVDS Output Clock Oscillator, 38MHz Min, 640MHz Max, SMD, 6 PIN; CategoryPassive components oscillator; File Size156KB，1 Pages; ManufacturerEuroquartz; Websitehttp://www.euroquartz.co.uk/

Download Datasheet Parametric View All

3GDF62F-80N-FREQ Overview

LVDS Output Clock Oscillator, 38MHz Min, 640MHz Max, SMD, 6 PIN

3GDF62F-80N-FREQ Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Reach Compliance Code	compliant
Other features	TRI-STATE; ENABLE/DISABLE FUNCTION
Maximum control voltage	3 V
Minimum control voltage	0.3 V
maximum descent time	0.7 ns
Frequency Adjustment - Mechanical	NO
Frequency offset/pull rate	80 ppm
frequency stability	100%
Installation features	SURFACE MOUNT
Maximum operating frequency	640 MHz
Minimum operating frequency	38 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
Output load	50 OHM
physical size	11.4mm x 9.6mm x 2.5mm
longest rise time	0.7 ns
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Base Number Matches	1

Preview

Download Datasheet

View All

EURO

QUARTZ

11.4 x 9.6 x 2.5mm SMD

Frequency range 38MHz to 640MHz

LVDS Output

Supply Voltage 3.3 VDC

Phase jitter 0.4ps typical

Pull range from ±30ppm to ±150ppm

GDF62 LVDS VCXO

38.0MHz to 640.0MHz

DESCRIPTION

GDF62 VCXOs are packaged in a 6 pad 11.4 x 9.6m SMD package.

Typical phase jitter for GDF series VCXOs is 0.4 ps. Output is LVDS.

Applications include phase lock loop, SONET/ATM, set-top boxes,

MPEG , audio/video modulation, video game consoles and HDTV.

OUTLINE & DIMENSIONS

SPECIFICATION

Frequency Range:

Supply Voltage:

Output Logic:

RMS Period Jitter:

Peak to Peak Jitter:

Phase Jitter:

Initial Frequency Accuracy:

Output Voltage HIGH (1):

Output Voltage LOW (0):

Pulling Range:

Control Voltage Range:

Temperature Stability:

Output Load:

Rise/Fall Times:

Duty Cycle:

Start-up Time:

Current Consumption:

Static Discharge Protection:

Storage Temperature:

Ageing:

Enable/Disable:

RoHS Status:

38.0MHz to 640.0MHz

3.3 VDC ±5%

LVDS

3.0ps typical

20.0ps typical, 30.0ps maximum

0.4ps typical, 5.0ps maximum

Tune to the nominal frequency

with Vc= 1.65 ±0.2VDC

1.4 Volts typical

1.1 Volts typical

From ±30ppm to ±150ppm

1.65 ±1.35 Volts

See table

50W into Vdd or Thevenin equiv.

0.5ns typ., 0.7ns max.

20% Vdd to 80% Vdd

50% ±5%

(Measured at Vdd-1.3V)

10ms maximum, 5ms typical

55mA typical, 60mA maximum

(At 202.50MHz)

2kV maximum

-55° to +150°C

±2ppm per year maximum

See table

Fully compliant or non compliant

FREQUENCY STABILITY

Stability Code Stability ±ppm Temp. Range

0°~+70°C

100

0°~+70°C

-40°~+85°C

100

-40°~+85°C

If non-standard frequency stability is required

Use ‘I’ followed by stability, i.e. I20 for ±20ppm

ENABLE/DISABLE FUNCTION

Tristate Pad

Status

Not connected

Below 0.3Vdd

(Ref. to ground)

Above 0.7Vdd

(Ref. to ground)

Output Status

LVDS and Complimentary LVDS enabled

Both outputs are disabled (high impedance)

Both outputs are enabled

PART NUMBERING

Example:

Supply Voltage

3 = +3.3V

Series Designator

GDF62

RoHS Status

G = Compliant

Blank - Non-compliant

Stability over temperature range

(See table)

Pullability in ±ppm

Pullability determinator

N = minimum

M = maximum

T = Typical

Frequency in MHz

3GDF62GB-80N-60.000

EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE

Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 info@euroquartz.co.uk www.euroquartz.co.uk

Recommended Resources

Chicken farm photoelectric control circuit

Load limiter circuit using power switch integrated circuit

Precision regulated power supply circuit for UJ-1 type potentiometer

Single-button bistable electronic switch made using NE555

Lighting voice-activated switch circuit using thyristor - automatic brightness adjustment additional circuit

Programmable peak detection circuit

Is there any good serial port protocol and verification program?: Hotpower previously built an LPC....; jiemei6617 stm32/stm8

Cyclone V SOC Application Issues: Hello everyone, I am using Cyclone V SOC, and I have encountered a problem. When I do not download the FPGA side code, the ARM side can start normally, but when I download the FPGA side logic, the ARM...; yuanguangyi FPGA/CPLD

How to call Verilog's system task in Quartus?: Can I write a Verilog program in Quartus and call the built-in system tasks and functions of Verilog? For example, $display? After I compiled, Quartus said Ignoring unsupported system task. I checked ...; cjcnsn Embedded System

An infuriating interview experience at Xunlei: I went to Xunlei for an interview and came back very angry. Let's take a look at my experience. If you really want to go, you should prepare in advance. http://blog.eeworld.net/nbcool...; shengming217 Embedded System

How to write TCP/IP protocol into arm (without operating system 0: My boss wants me to implement communication between PC and ARM based on TCP/IP protocol. I chose LPC2478 as ARM, which seems to have Ethernet interface. I need to implement basic protocol. I see many ...; sunylqh ARM Technology

EEWORLD University ---- LittleFuse - Automotive Electronic Circuit Protection: Market, Standards, Applications and Solutions: LittleFuse - Automotive Electronic Circuit Protection: Market, Standards, Applications and Solutions : https://training.eeworld.com.cn/course/3844...; hi5 Talking

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components