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5962-8983904RA

Description
EE PLD, 10ns, PAL-Type, CMOS, CDIP20, CERAMIC, DIP-20
CategoryProgrammable logic devices    Programmable logic   
File Size104KB,8 Pages
ManufacturerLattice
Websitehttp://www.latticesemi.com
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5962-8983904RA Overview

EE PLD, 10ns, PAL-Type, CMOS, CDIP20, CERAMIC, DIP-20

5962-8983904RA Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instructionCERAMIC, DIP-20
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
Other features1 EXTERNAL CLOCK; REGISTER PRELOAD
ArchitecturePAL-TYPE
maximum clock frequency58.8 MHz
JESD-30 codeR-GDIP-T20
length25.27 mm
Humidity sensitivity level1
Dedicated input times8
Number of I/O lines8
Number of entries18
Output times8
Number of product terms64
Number of terminals20
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize8 DEDICATED INPUTS, 8 I/O
Output functionMACROCELL
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP20,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay10 ns
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height5.08 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
Base Number Matches1
GAL16V8/883
High Performance E
2
CMOS PLD
Generic Array Logic™
Features
• HIGH PERFORMANCE E
2
CMOS
®
TECHNOLOGY
— 7.5 ns Maximum Propagation Delay
— Fmax = 100 MHz
— 6 ns Maximum from Clock Input to Data Output
— TTL Compatible 12 mA Outputs
— UltraMOS
®
Advanced CMOS Technology
• 50% REDUCTION IN POWER FROM BIPOLAR
— 75mA Typ Icc
• ACTIVE PULL-UPS ON ALL PINS (GAL16V8D-7 and
GAL16V8D-10)
• E CELL TECHNOLOGY
— Reconfigurable Logic
— Reprogrammable Cells
— 100% Tested/100% Yields
— High Speed Electrical Erasure (<100ms)
— 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
— Maximum Flexibility for Complex Logic Designs
— Programmable Output Polarity
— Also Emulates 20-pin PAL
®
Devices with Full Function/
Fuse Map/Parametric Compatibility
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
— 100% Functional Testability
• APPLICATIONS INCLUDE:
— DMA Control
— State Machine Control
— High Speed Graphics Processing
— Standard Logic Speed Upgrade
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
I
8
I
OLMC
OE
Functional Block Diagram
I/CLK
CLK
8
I
8
I
OLMC
I/O/Q
OLMC
I/O/Q
PROGRAMMABLE
AND-ARRAY
(64 X 32)
8
OLMC
I/O/Q
2
I
8
OLMC
I/O/Q
I
8
OLMC
I/O/Q
I
8
OLMC
I/O/Q
I
8
OLMC
I/O/Q
I/O/Q
I/OE
Description
The GAL16V8/883 is a high performance E
2
CMOS program-
mable logic device processed in full compliance to MIL-STD-883.
This military grade device combines a high performance CMOS
process with Electrically Erasable (E
2
) floating gate technology to
provide the highest speed/power performance available in the
883 qualified PLD market. The GAL16V8D/883, at 7.5ns maxi-
mum propagation delay time, is the world's fastest military quali-
fied CMOS PLD.
The generic GAL architecture provides maximum design flexibil-
ity by allowing the Output Logic Macrocell (OLMC) to be config-
ured by the user. The GAL16V8/883 is capable of emulating all
standard 20-pin PAL
®
devices with full function/fuse map/para-
metric compatibility.
Unique test circuitry and reprogrammable cells allow complete
AC, DC, and functional testing during manufacture. Therefore,
Lattice Semiconductor delivers 100% field programmability and
functionality of all GAL products. In addition, 100 erase/write
cycles and data retention in excess of 20 years are specified.
Pin Configuration
CERDIP
LCC
I/CLK
I
I
3
I
I
I
I
I
8
9
I
GND
11
I/OE I/O/Q
13
I/O/Q
6
4
I
2
I/CLK Vcc
20
I/O/Q
19
18
I/O/Q
I/O/Q
1
20
Vcc
I/O/Q
I/O/Q
I
I
I
I
I
5
GAL
16V8
15
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
I/O/Q
GAL16V8
Top View
16
I/O/Q
I/O/Q
14
I/O/Q
I
I
GND
10
11
I/OE
Copyright © 1999 Lattice Semiconductor Corp. All brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject
to change without notice.
LATTICE SEMICONDUCTOR CORP., 5555 Northeast Moore Ct., Hillsboro, Oregon 97124, U.S.A.
Tel. (503) 268-8000; 1-800-LATTICE; FAX (503) 268-8556; http://www.latticesemi.com
February 1999
16v8mil_03
1

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Description EE PLD, 10ns, PAL-Type, CMOS, CDIP20, CERAMIC, DIP-20 EE PLD, 20ns, PAL-Type, CMOS, CQCC20, LCC-20 EE PLD, 7.5ns, PAL-Type, CMOS, CDIP20, CERAMIC, DIP-20 EE PLD, 7.5ns, PAL-Type, CMOS, CQCC20, LCC-20 EE PLD, 15ns, PAL-Type, CMOS, CQCC20, LCC-20 EE PLD, 30ns, PAL-Type, CMOS, CDIP20, CERAMIC, DIP-20 EE PLD, 10ns, PAL-Type, CMOS, CQCC20, LCC-20
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible incompatible
Parts packaging code DIP QLCC DIP QLCC QLCC DIP QLCC
package instruction CERAMIC, DIP-20 LCC-20 CERAMIC, DIP-20 LCC-20 LCC-20 CERAMIC, DIP-20 LCC-20
Contacts 20 20 20 20 20 20 20
Reach Compliance Code not_compliant not_compliant unknown unknown not_compliant not_compliant not_compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Other features 1 EXTERNAL CLOCK; REGISTER PRELOAD 1 EXTERNAL CLOCK; REGISTER PRELOAD 1 EXTERNAL CLOCK; REGISTER PRELOAD 8 OUTPUT LOGIC MACROCELLS 1 EXTERNAL CLOCK; REGISTER PRELOAD 1 EXTERNAL CLOCK; REGISTER PRELOAD 1 EXTERNAL CLOCK; REGISTER PRELOAD
Architecture PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE PAL-TYPE
maximum clock frequency 58.8 MHz 33.3 MHz 76.9 MHz 76.9 MHz 41.6 MHz 22.2 MHz 58.8 MHz
JESD-30 code R-GDIP-T20 S-CQCC-N20 R-GDIP-T20 S-CQCC-N20 S-CQCC-N20 R-GDIP-T20 S-CQCC-N20
length 25.27 mm 8.89 mm 25.27 mm 8.89 mm 8.89 mm 25.27 mm 8.89 mm
Humidity sensitivity level 1 1 1 1 1 1 1
Dedicated input times 8 8 8 8 8 8 8
Number of I/O lines 8 8 8 8 8 8 8
Number of entries 18 18 18 18 18 18 18
Output times 8 8 8 8 8 8 8
Number of product terms 64 64 64 64 64 64 64
Number of terminals 20 20 20 20 20 20 20
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
organize 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O 8 DEDICATED INPUTS, 8 I/O
Output function MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL MACROCELL
Package body material CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED
encapsulated code DIP QCCN DIP QCCN QCCN DIP QCCN
Encapsulate equivalent code DIP20,.3 LCC20,.35SQ DIP20,.3 LCC20,.35SQ LCC20,.35SQ DIP20,.3 LCC20,.35SQ
Package shape RECTANGULAR SQUARE RECTANGULAR SQUARE SQUARE RECTANGULAR SQUARE
Package form IN-LINE CHIP CARRIER IN-LINE CHIP CARRIER CHIP CARRIER IN-LINE CHIP CARRIER
Peak Reflow Temperature (Celsius) NOT SPECIFIED 225 225 225 225 225 225
power supply 5 V 5 V 5 V 5 V 5 V 5 V 5 V
Programmable logic type EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD EE PLD
propagation delay 10 ns 20 ns 7.5 ns 7.5 ns 15 ns 30 ns 10 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
Filter level MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883
Maximum seat height 5.08 mm 2.54 mm 5.08 mm 2.54 mm 2.54 mm 5.08 mm 2.54 mm
Maximum supply voltage 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount NO YES NO YES YES NO YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
Terminal form THROUGH-HOLE NO LEAD THROUGH-HOLE NO LEAD NO LEAD THROUGH-HOLE NO LEAD
Terminal pitch 2.54 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm 2.54 mm 1.27 mm
Terminal location DUAL QUAD DUAL QUAD QUAD DUAL QUAD
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 7.62 mm 8.89 mm 7.62 mm 8.89 mm 8.89 mm 7.62 mm 8.89 mm
Base Number Matches 1 1 1 1 1 1 1

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