ADSP-2101TG-40 datasheet, PDF - EEWORLD Datasheet

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ADSP-2101TG-40: DescriptionIC 24-BIT, 10.24 MHz, OTHER DSP, CPGA68, PGA-68, Digital Signal Processor; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，28 Pages; ManufacturerADI; Websitehttps://www.analog.com

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ADSP-2101TG-40 Overview

IC 24-BIT, 10.24 MHz, OTHER DSP, CPGA68, PGA-68, Digital Signal Processor

ADSP-2101TG-40 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	ADI
Parts packaging code	PGA
package instruction	PGA-68
Contacts	68
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
Other features	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16
Address bus width	14
barrel shifter	YES
bit size	16
boundary scan	NO
maximum clock frequency	10.24 MHz
External data bus width	24
Format	FIXED POINT
Integrated cache	NO
Internal bus architecture	MULTIPLE
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
low power mode	YES
Number of DMA channels
Number of external interrupt devices	3
Number of serial I/Os	2
Number of terminals	68
Number of timers	1
On-chip data RAM width	16
On-chip program ROM width
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
RAM (number of words)	512
Maximum slew rate	55 mA
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches	1

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ADSP-2101TG-40 Related Products

	ADSP-2101TG-40	ADSP-2101BS-40	ADSP-2101TG/883B-40	ADSP-2101KP-40	ADSP-2101KS-40	ADSP-2101KG-40	ADSP-2101BP-40
Description	IC 24-BIT, 10.24 MHz, OTHER DSP, CPGA68, PGA-68, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, PQFP80, PLASTIC, QFP-80, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, CPGA68, PGA-68, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, CQCC68, PLASTIC, LCC-68, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, PQFP80, PLASTIC, QFP-80, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, CPGA68, PGA-68, Digital Signal Processor	IC 24-BIT, 10.24 MHz, OTHER DSP, CQCC68, PLASTIC, LCC-68, Digital Signal Processor
Is it Rohs certified?	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible	incompatible
Parts packaging code	PGA	QFP	PGA	LCC	QFP	PGA	LCC
package instruction	PGA-68	PLASTIC, QFP-80	PGA, PGA68,11X11	PLASTIC, LCC-68	PLASTIC, QFP-80	PGA, PGA68,11X11	QCCJ, LDCC68,1.0SQ
Contacts	68	80	68	68	80	68	68
Reach Compliance Code	unknown	unknown	not_compliant	not_compliant	not_compliant	not_compliant	unknown
ECCN code	3A001.A.2.C	3A991.A.3	3A001.A.2.C	3A991.A.3	3A991.A.3	3A991.A.3	3A991.A.3
Other features	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16	COMPANDING HARDWARE WITH SERIAL PORTS; INTERNAL WIDTH PMA=14; DMA=14; PMD=24; DMD=16
Address bus width	14	14	14	14	14	14	14
barrel shifter	YES	YES	YES	YES	YES	YES	YES
bit size	16	16	16	16	16	16	16
boundary scan	NO	NO	NO	NO	NO	NO	NO
maximum clock frequency	10.24 MHz	10.24 MHz	10.24 MHz	10.24 MHz	10.24 MHz	10.24 MHz	10.24 MHz
External data bus width	24	24	24	24	24	24	24
Format	FIXED POINT	FIXED POINT	FIXED POINT	FIXED POINT	FIXED POINT	FIXED POINT	FIXED POINT
Integrated cache	NO	NO	NO	NO	NO	NO	NO
Internal bus architecture	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE	MULTIPLE
JESD-30 code	S-CPGA-P68	S-PQFP-G80	S-CPGA-P68	S-CQCC-J68	S-PQFP-G80	S-CPGA-P68	S-CQCC-J68
JESD-609 code	e0	e0	e0	e0	e0	e0	e0
low power mode	YES	YES	YES	YES	YES	YES	YES
Number of external interrupt devices	3	3	3	3	3	3	3
Number of serial I/Os	2	2	2	2	2	2	2
Number of terminals	68	80	68	68	80	68	68
Number of timers	1	1	1	1	1	1	1
On-chip data RAM width	16	16	16	16	16	16	16
Maximum operating temperature	125 °C	85 °C	125 °C	70 °C	70 °C	70 °C	85 °C
Minimum operating temperature	-55 °C	-40 °C	-55 °C	-	-	-	-40 °C
Package body material	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	QFP	PGA	QCCJ	QFP	PGA	QCCJ
Encapsulate equivalent code	PGA68,11X11	QFP80,.7SQ	PGA68,11X11	LDCC68,1.0SQ	QFP80,.7SQ	PGA68,11X11	LDCC68,1.0SQ
Package shape	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	FLATPACK	GRID ARRAY	CHIP CARRIER	FLATPACK	GRID ARRAY	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	220	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V	5 V	5 V	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
RAM (number of words)	512	512	512	512	512	512	512
Maximum slew rate	55 mA	55 mA	55 mA	55 mA	55 mA	55 mA	55 mA
Maximum supply voltage	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
Minimum supply voltage	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
Nominal supply voltage	5 V	5 V	5 V	5 V	5 V	5 V	5 V
surface mount	NO	YES	NO	YES	YES	NO	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	MILITARY	INDUSTRIAL	MILITARY	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	GULL WING	PIN/PEG	J BEND	GULL WING	PIN/PEG	J BEND
Terminal pitch	2.54 mm	0.635 mm	2.54 mm	1.27 mm	0.635 mm	2.54 mm	1.27 mm
Terminal location	PERPENDICULAR	QUAD	PERPENDICULAR	QUAD	QUAD	PERPENDICULAR	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	30	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
uPs/uCs/peripheral integrated circuit type	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER	DIGITAL SIGNAL PROCESSOR, OTHER
Maker	ADI	ADI	-	ADI	ADI	-	ADI
Base Number Matches	1	1	1	1	1	1	-

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