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813N2532CKILFT

Description
VFQFPN-32, Reel
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size719KB,25 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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813N2532CKILFT Overview

VFQFPN-32, Reel

813N2532CKILFT Parametric

Parameter NameAttribute value
Brand NameIntegrated Device Technology
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeVFQFPN
package instructionHVQCCN,
Contacts32
Manufacturer packaging codeNLG32P1
Reach Compliance Codecompliant
ECCN codeEAR99
JESD-30 codeS-XQCC-N32
JESD-609 codee3
length5 mm
Humidity sensitivity level3
Number of terminals32
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency156.25 MHz
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
Master clock/crystal nominal frequency38.88 MHz
Maximum seat height1 mm
Maximum supply voltage3.465 V
Minimum supply voltage3.135 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width5 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
Jitter Attenuator & FemtoClock
®
NG Multiplier
813N2532I
Datasheet
General Description
The 813N2532I device uses IDT's fourth generation FemtoClock
®
NG technology for optimal high clock frequency and low phase noise
performance, combined with a low power consumption and high
power supply noise rejection. The 813N2532I is a PLL based
synchronous multiplier that is optimized for PDH or SONET to
Ethernet clock jitter attenuation and frequency translation.
The 813N2532I is a fully integrated Phase Locked loop utilizing a
FemtoClock NG Digital VCXO that provides the low jitter, high
frequency SONET/PDH output clock that easily meets OC-48 jitter
requirements. This VCXO technology simplifies PLL design by
replacing the pullable crystal requirement of analog VCXOs with a
fixed 27MHz generator crystal. Jitter attenuation down to 10Hz is
provided by an external loop filter. Pre-divider and output divider
multiplication ratios are selected using device selection control pins.
The multiplication ratios are optimized to support most common
clock rates used in PDH, SONET and Ethernet applications. The
device requires the use of an external, inexpensive fundamental
mode 27MHz crystal. The device is packaged in a space-saving
32-VFQFN package and supports commercial temperature range.
Features
Fourth generation FemtoClock
®
NG technology
Two LVPECL output pairs
Output frequencies: 19.44MHz, 25MHz, 125MHz, 155.52MHz and
156.25MHz
Two differential inputs support the following input types: LVPECL,
LVDS, LVHSTL, HCSL
Accepts input frequencies from 8kHz to 38.88MHz including
8kHz, 19.44MHz, 25MHz and 38.88MHz
Crystal interface optimized for a 27MHz, 10pF parallel resonant
crystal
Attenuates the phase jitter of the input clock by using a low-cost
fundamental mode crystal
Customized settings for jitter attenuation and reference tracking
using external loop filter connection
FemtoClock NG frequency multiplier provides low jitter, high
frequency output
Absolute pull range: ±100ppm
Power supply noise rejection (PSNR): -95dB (typical)
RMS phase jitter @ 156.25MHz, using a 27MHz crystal
(12kHz – 20MHz): 0.6ps (typical)
RMS phase jitter @ 155.52MHz, using a 27MHz crystal
(12kHz – 20MHz): 0.622ps (typical)
RMS phase jitter @ 125MHz, using a 27MHz crystal
(12kHz – 20MHz): 0.6ps (typical)
3.3V supply voltage
-40°C to 85°C ambient operating temperature
Available in lead-free (RoHS 6) package
Pin Assignment
XTAL_OUT
XTAL_IN
nCLK0
CLK0
nCLK1
CLK1
V
CCX
V
CC
32 31 30
29 28 27 26 25
LF1
LF0
1
2
24
V
EE
23 nQB
22
21
QB
V
CCO
ISET
3
V
EE
4
CLK_SEL
V
CC
5
6
20 nQA
19 QA
18
17
9
FB_SEL
LOR 7
V
EE
8
10 11 12 13 14 15 16
ODASEL_1
ODBSEL_1
ODBSEL_0
PDSEL_1
PDSEL_0
V
CC
V
CCA
V
EE
ODASEL_0
813N2532I
32 Lead VFQFN
5mm x 5mm x 0.925mm package body
K Package
Top View
©2016 Integrated Device Technology, Inc.
1
Revision D, April 11, 2016
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