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AM29LV065DU121RWHEB

Description
Flash, 8MX8, 120ns, PBGA63, 11 X 12 MM, 0.80 MM PITCH, FBGA-63
Categorystorage    storage   
File Size977KB,50 Pages
ManufacturerSPANSION
Websitehttp://www.spansion.com/
Download Datasheet Parametric View All

AM29LV065DU121RWHEB Overview

Flash, 8MX8, 120ns, PBGA63, 11 X 12 MM, 0.80 MM PITCH, FBGA-63

AM29LV065DU121RWHEB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeBGA
package instruction11 X 12 MM, 0.80 MM PITCH, FBGA-63
Contacts63
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time120 ns
startup blockBOTTOM/TOP
JESD-30 codeR-PBGA-B63
JESD-609 codee0
length12 mm
memory density67108864 bit
Memory IC TypeFLASH
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals63
word count8388608 words
character code8000000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize8MX8
Package body materialPLASTIC/EPOXY
encapsulated codeTFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
Programming voltage3 V
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formBALL
Terminal pitch0.8 mm
Terminal locationBOTTOM
Maximum time at peak reflow temperature30
typeNOR TYPE
width11 mm
Base Number Matches1
ADVANCE INFORMATION
Am29LV065D
64 Megabit (8 M x 8-Bit) CMOS 3.0 Volt-only
Uniform Sector Flash Memory with VersatileI/O™ Control
DISTINCTIVE CHARACTERISTICS
s
Single power supply operation
— 3.0 to 3.6 volt read, erase, and program operations
s
VersatileI/O™ control
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the V
IO
pin
s
High performance
— Access times as fast as 90 ns
s
Manufactured on 0.23 µm process technology
s
CFI (Common Flash Interface) compliant
— Provides device-specific information to the system,
allowing host software to easily reconfigure for
different Flash devices
s
SecSi™ (Secured Silicon) Sector region
— 256-byte sector for permanent, secure identification
through an 16-byte random Electronic Serial Number
— May be programmed and locked at the factory or by
the customer
— Accessible through a command sequence
s
Ultra low power consumption (typical values at 3.0 V,
5 MHz)
— 9 mA typical active read current
— 26 mA typical erase/program current
— 200 nA typical standby mode current
s
Flexible sector architecture
— One hundred twenty-eight 64 Kbyte sectors
s
Sector Protection
— A hardware method to lock a sector to prevent
program or erase operations within that sector
— Sectors can be locked in-system or via programming
equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
s
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically writes
and verifies data at specified addresses
s
Compatibility with JEDEC standards
— Pinout and software compatible with single-power
supply Flash
— Superior inadvertent write protection
s
Minimum 1 million erase cycle guarantee per sector
s
Package options
— 48-pin TSOP
— 63-ball FBGA
s
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
s
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
s
Unlock Bypass Program command
— Reduces overall programming time when issuing
multiple program command sequences
s
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or
erase cycle completion
s
Hardware reset pin (RESET#)
— Hardware method to reset the device for reading array
data
s
ACC pin
— Accelerates programming time for higher throughput
during system production
s
Program and Erase Performance (V
HH
not applied to
the ACC input pin)
— Byte program time: 5 µs typical
— Sector erase time: 1.6 s typical for each 64 Kbyte
sector
s
20-year data retention at 125°C
— Reliable operation for the life of the system
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice. 8/15/00
Publication#
23544
Rev:
A
Amendment/+2
Issue Date:
August 14, 2000
Refer to AMD’s Website (www.amd.com) for the latest information.
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