The UT54ACS14E and the UT54ACTS14E are hex inverters
with schmitt trigger inputs. The circuits perform the Boolean
function Y = A.
The devices are characterized over full HiRel temperature
range of -55C to +125C.
m
CRH CMOS Process
Low power consumption
Wide power supply operating range of 3.0V to 5.5V
Available QML Q or V processes
14-lead flatpack
UT54ACS14E - SMD 5962-96524
UT54ACTS14E - SMD 5962-96525
FUNCTION TABLE
INPUT
A
H
L
OUTPUT
Y
L
H
- Latchup immune
High speed
PINOUTS
14-Lead Flatpack
Top View
A1
Y1
A2
Y2
A3
Y3
V
SS
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
A6
Y6
A5
Y5
A4
Y4
LOGIC DIAGRAM
LOGIC SYMBOL
A1
A2
A3
A4
A5
A6
(1)
(3)
(5)
(9)
(11)
(13)
1
(2)
(4)
(6)
(8)
(10)
(12)
Y1
Y2
Y3
Y4
Y5
Y6
A4
Y4
A3
Y3
A2
Y2
A1
Y1
Note:
1. Logic symbol in accordance with ANSI/IEEE standard 91-1984 and
IEC Publication 617-12.
A5
Y5
A6
Y6
1
OPERATIONAL ENVIRONMENT
1
PARAMETER
Total Dose
SEU Threshold
2
SEL Threshold
Neutron Fluence
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
LIMIT
1.0E6
80
108
1.0E14
UNITS
rads(Si)
MeV-cm
2
/mg
MeV-cm
2
/mg
n/cm
2
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
DD
V
I/O
T
STG
T
J
T
LS
JC
I
I
P
D
PARAMETER
Supply voltage
Voltage any pin
Storage Temperature range
Maximum junction temperature
Lead temperature (soldering 5 seconds)
Thermal resistance junction to case
DC input current
Maximum package power dissipation
permitted @ Tc = +125
o
C
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
2. Per MIL-STD-883, method 1012.1, Section 3.4.1, P
D
= (T
j(max)
- T
c(max)
) /
jc
LIMIT
-0.3 to 7.0
-0.3 to V
DD
+ 0.3
-65 to +150
+175
+300
15
10
3.3
UNITS
V
V
C
C
C
C/W
mA
W
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
DD
V
IN
T
C
PARAMETER
Supply voltage
Input voltage any pin
Temperature range
LIMIT
3.0 to 5.5
0 to V
DD
-55 to +125
UNITS
V
V
C
2
DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACS14E
7
( V
DD
= 3.0V to 5.5V; V
SS
= 0V
6
; -55C < T
C
< +125C)
SYMBOL
V
T+
V
T-
V
H1
V
H2
I
IN
V
OL
DESCRIPTION
Schmitt trigger positive-going
threshold
1
Schmitt trigger negative-going
threshold
1
Range of hysteresis (V
T+
- V
T-
)
Range of hysteresis (V
T+
- V
T-
)
Input leakage current
Low-level output voltage
3
CONDITION
V
DD
from 3.0V to 5.5V
V
DD
from 3.0V to 5.5V
V
DD
from 4.5V to 5.5V
V
DD
from 3.0V to 3.6V
V
IN
= V
DD
or V
SS
I
OL
= 100A
V
DD
from 3.0V to 5.5V
V
OH
High-level output voltage
3
I
OH
= -100A
V
DD
from 3.0V to 5.5V
I
OS1
Short-circuit output current
2 ,4
V
O
= V
DD
and V
SS
V
DD
from 4.5V to 5.5V
I
OS2
Short-circuit output current
2 ,4
V
O
= V
DD
and V
SS
V
DD
from 3.0V to 3.6V
I
OL1
Low level output current
9
(sink)
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
DD
from 4.5V to 5.5V
I
OL2
Low level output current
9
(sink)
V
IN
= V
DD
or V
SS
V
OL
= 0.4V
V
DD
from 3.0V to 3.6V
I
OH1
High level output current
9
(source)
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
V
DD
from 4.5V to 5.5V
I
OH2
High level output current
9
(source)
V
IN
= V
DD
or V
SS
V
OH
= V
DD
- 0.4V
V
DD
from 3.0V to 3.6V
-6
mA
-8
mA
6
mA
8
mA
-100
100
mA
-200
200
mA
V
DD
- 0.25
V
0.3V
DD
0.6
0.3
-1
1.5
1.2
1
0.25
MIN
MAX
0.7V
DD
UNIT
V
V
V
V
A
V
3
P
total1
P
total2
Power dissipation
2, 8
Power dissipation
2, 8
C
L
= 50pF
V
DD
from 4.5V to 5.5V
C
L
= 50pF
V
DD
from 3.0V to 3.6V
1.9
mW/
MHz
mW/
MHz
A
0.76
I
DDQ
Quiescent Supply Current
V
IN
= V
DD
or V
SS
V
DD
from 3.0V to 5.5V
= 1MHz, V
DD
= 0
= 1MHz, V
DD
= 0
10
C
IN
C
OUT
Input capacitance
5
Output capacitance
5
15
15
pF
pF
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: V
IH
= V
IH
(min) + 20%, - 0%; V
IL
= V
IL
(max) + 0%, -
50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are
guaranteed to V
IH
(min) and V
IL
(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density
5.0E5
amps/cm
2
, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765pF/
MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and V
SS
at
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose
1E6 rads(Si) per MIL-STD-883 Method 1019.
8. Power dissipation specified per switching output.
9. Guaranteed by characterization, but not tested.
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