S29AL004D
4 Megabit (512 Kx 8-Bit/256 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
ADVANCE
INFORMATION
Notice to Readers:
The Advance Information status indicates that this
document contains information on one or more products under development
at Spansion LLC. The information is intended to help you evaluate this product.
Do not design in this product without contacting the factory. Spansion LLC
reserves the right to change or discontinue work on this proposed product
without notice.
Publication Number
S29AL004D_00
Revision
A
Amendment
1
Issue Date
February 18, 2005
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S29AL004D
4 Megabit (512 K x 8-Bit/256 K x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
Data Sheet
Distinctive Characteristics
Architectural Advantages
Single power supply operation
— 2.7 to 3.6 volt read and write operations for battery-
powered applications
ADVANCE
INFORMATION
Performance Characteristics
High performance
— Access times as fast as 70 ns
Manufactured on 200nm process technology
— Compatible with 320nm Am29LV400B and
MBM29LV400T/BC
Ultra low power consumption (typical values
at 5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 9 mA read current
— 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and seven
64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and seven
32 Kword sectors (word mode)
— Supports full chip erase
Cycling Endurance: 1,000,000 cycles per
sector typical
Data Retention: 20 years typical
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Package Options
48-ball FBGA
48-pin TSOP
44-pin SO
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically writes
and verifies data at specified addresses
Software Features
Data# Polling and toggle bits
— Provides a software method of detecting program or
erase operation completion
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from, or
program data to, a sector that is not being erased,
then resumes the erase operation
Compatibility with JEDEC standards
— Pinout and software compatible with single-power
supply Flash
— Superior inadvertent write protection
Hardware Features
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting program or
erase cycle completion
Sector Protection features
— A hardware method of locking a sector to prevent any
program or erase operations within that sector
— Sectors can be locked in-system or via programming
equipment
— Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading array
data
Publication Number
S29AL004D_00
Revision
A
Amendment
1
Issue Date
February 18, 2005
A d v a n c e
I n f o r m a t i o n
Notice On Data Sheet Designations
Spansion LLC issues data sheets with Advance Information or Preliminary designations to advise
readers of product information or intended specifications throughout the product life cycle, in-
cluding development, qualification, initial production, and full production. In all cases, however,
readers are encouraged to verify that they have the latest information before finalizing their de-
sign. The following descriptions of Spansion data sheet designations are presented here to high-
light their presence and definitions.
Advance Information
The Advance Information designation indicates that Spansion LLC is developing one or more spe-
cific products, but has not committed any design to production. Information presented in a doc-
ument with this designation is likely to change, and in some cases, development on the product
may discontinue. Spansion LLC therefore places the following conditions upon Advance Informa-
tion content:
“This document contains information on one or more products under development at Spansion LLC. The
information is intended to help you evaluate this product. Do not design in this product without con-
tacting the factory. Spansion LLC reserves the right to change or discontinue work on this proposed
product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a
commitment to production has taken place. This designation covers several aspects of the prod-
uct life cycle, including product qualification, initial production, and the subsequent phases in the
manufacturing process that occur before full production is achieved. Changes to the technical
specifications presented in a Preliminary document should be expected while keeping these as-
pects of production under consideration. Spansion places the following conditions upon Prelimi-
nary content:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. The Preliminary status of this document indicates that product qualification has been completed,
and that initial production has begun. Due to the phases of the manufacturing process that require
maintaining efficiency and quality, this document may be revised by subsequent versions or modifica-
tions due to changes in technical specifications.”
Combination
Some data sheets will contain a combination of products with different designations (Advance In-
formation, Preliminary, or Full Production). This type of document will distinguish these products
and their designations wherever necessary, typically on the first page, the ordering information
page, and pages with DC Characteristics table and AC Erase and Program table (in the table
notes). The disclaimer on the first page refers the reader to the notice on this page.
Full Production (No Designation on Document)
When a product has been in production for a period of time such that no changes or only nominal
changes are expected, the Preliminary designation is removed from the data sheet. Nominal
changes may include those affecting the number of ordering part numbers available, such as the
addition or deletion of a speed option, temperature range, package type, or V
IO
range. Changes
may also include those needed to clarify a description or to correct a typographical error or incor-
rect specification. Spansion LLC applies the following conditions to documents in this category:
“This document states the current technical specifications regarding the Spansion product(s) described
herein. Spansion LLC deems the products to have been in sufficient production volume such that sub-
sequent versions of this document are not expected to change. However, typographical or specification
corrections, or modifications to the valid combinations offered may occur.”
Questions regarding these document designations may be directed to your local AMD or Fujitsu
sales office.
2
S29AL004D
S29AL004D_00_A1 February 18, 2005
A d v a n c e
I n f o r m a t i o n
General Description
The S29AL004D is a 4 Mbit, 3.0 volt-only Flash memory organized as 524,288
bytes or 262,144 words. The device is offered in 48-ball FBGA, 44-pin SO, and
48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the
byte-wide (x8) data appears on DQ7–DQ0. This device requires only a single, 3.0
volt V
CC
supply to perform read, program, and erase operations. A standard
EPROM programmer can also be used to program and erase the device.
This device is manufactured using Spansion’s 200nm process technology, and of-
fers all the features and benefits of the Am29LV400B and MBM29LV400T/BC,
which were manufactured using 320nm process technology.
The standard device offers access times of 70 and 90ns, allowing high speed mi-
croprocessors to operate without wait states. To eliminate bus contention the
device has separate chip enable (CE#), write enable (WE#) and output enable
(OE#) controls.
The device requires only a
single 3.0 volt power supply
for both read and write
functions. Internally generated and regulated voltages are provided for the pro-
gram and erase operations.
The device is entirely command set compatible with the
JEDEC single-power-
supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register contents serve as input to an in-
ternal state-machine that controls the erase and programming circuitry. Write
cycles also internally latch addresses and data needed for the programming and
erase operations. Reading data out of the device is similar to reading from other
Flash or EPROM devices.
Device programming occurs by executing the program command sequence. This
initiates the
Embedded Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies proper cell margin. The
Unlock Bypass
mode facilitates faster programming times by requiring only two
write cycles to program data instead of four.
Device erasure occurs by executing the erase command sequence. This initiates
the
Embedded Erase
algorithm—an internal algorithm that automatically
preprograms the array (if it is not already programmed) before executing the
erase operation. During erase, the device automatically times the erase pulse
widths and verifies proper cell margin.
The host system can detect whether a program or erase operation is complete by
observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6 (tog-
gle)
status bits.
After a program or erase cycle is completed, the device is ready
to read array data or accept another command.
The
sector erase architecture
allows memory sectors to be erased and repro-
grammed without affecting the data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low V
CC
detector that automat-
ically inhibits write operations during power transitions. The
hardware sector
protection
feature disables both program and erase operations in any combina-
tion of the sectors of memory. This can be achieved in-system or via
programming equipment.
February 18, 2005 S29AL004D_00_A1
S29AL004D
3
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