Datasheet
Linear/PWM Constant Current
VCM Driver
BU64291GWZ
●General
Description
The BU64291GWZ is designed to drive voice coil motors
(VCM) and operate with PWM to improve system power
efficiency or switch to linear control to improve system
noise. The driver includes ISRC (intelligent slew rate
control) to reduce mechanical ringing to optimize the
camera’s auto focus capabilities.
●Features
2.3 V (Min.) driver power supply
Selectable linear and PWM operational modes
Current source and sink output
10 bit resolution current control
ISRC mechanical ringing compensation
2-wire serial interface
Integrated current sense resistor
●Applications
Auto focus of Cell Phone
Auto focus of Digital still camera
Camera Modules
Lens Auto focus
Web, Tablet and PC cameras
●Typical
Application Circuit
3.0 V
0.1 to 10 µF
VDD
●Key
Specifications
PWM frequency:
Master clock:
Output ON resistance:
Maximum output current:
Operating temperature range:
●Package(s)
UCSP30L1
0.5 to 2 MHz
400 kHz(Typ.)
2.5
Ω(Typ.)
100 mA (Typ.)
- 25 to + 85 °C
W(Typ.) x D(Typ.) x H(Max.)
0.77 mm x 1.37 mm x 0.33 mm
1.8 V
Power Save
VREF
TSD & UVLO
ISOURCE
SCL
2-wire serial
Master
SDA
LOGIC
10 bit
DAC
PWM / Linear
Current
Control
Output
Control
ISINK
VCM MTR
POR
Current
Sense
GND
Figure.1 Typical Application Circuit
○Product
structure：Silicon monolithic integrated circuit
.
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This
product is not designed protection against radioactive rays
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TSZ02201-0H2H0BZ00330-1-2
05.Oct.2012 Rev.002
BU64291GWZ
●Pin
Configuration
Datasheet
1
A
GND
2
VDD
B
ISINK
ISOURCE
C
SDA
SCL
Figure.2 Pin configuration (TOP VIEW)
●Pin
Description
BALL
BALL
No.
Name
A1
A2
B1
B2
C1
C2
GND
VDD
ISINK
ISOURCE
SDA
SCL
Ground
Function
Power supply voltage
Current sink output
Current source output
Serial data input
Serial clock input
●Block
Diagram
VDD
Power Save
VREF
TSD & UVLO
ISOURCE
SCL
LOGIC
SDA
10 bit
DAC
PWM / Linear
Current
Control
Output
Control
ISINK
POR
Current
Sense
GND
Figure 3. Block diagram
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BU64291GWZ
●Absolute
Maximum Ratings
Parameter
Power supply voltage
Control input voltage (SCL, SDA)
*1
Power dissipation
Operating temperature range
Junction temperature
Storage temperature range
Output current
*1
*2
*3
Datasheet
Symbol
VDD
VIN
Pd
Topr
Tjmax
Tstg
IOUT
Limit
- 0.5 to + 5.5
- 0.5 to + 5.5
390
*2
- 25 to + 85
125
- 55 to + 125
+ 200
*3
Unit
V
V
mW
°C
°C
°C
mA
VIN are 2-wire serial interface input pins (SCL, SDA)
Reduced by 3.9 mW / °C over 25 °C when mounted on a glass epoxy board (50 mm
×
58 mm
×
1.75 mm; 8 layers)
Must not exceed Pd, ASO, or Tjmax of 125 °C
●Recommended
Operating Ratings
Parameter
Power supply voltage
Control input voltage
*1
2-wire serial interface frequency
Output current
*1
*4
Symbol
VDD
VIN
FCLK
IOUT
Min.
2.3
0
-
-
Typ.
3.0
-
-
-
Max.
4.8
4.8
400
100
*4
Unit
V
V
kHz
mA
VIN are 2-wire serial interface input pins (SCL, SDA)
Must not exceed Pd, ASO
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TSZ22111・15・001
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TSZ02201-0H2H0BZ00330-1-2
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BU64291GWZ
●Electrical
Characteristics ( Unless otherwise specified Ta = 25 °C, VDD = 3.0 V )
Limit
Parameter
Symbol
Min.
Power Consumption
Standby current 1
Standby current 2
Circuit current
Control Input (VIN = SCL, SDA)
High level input voltage
Low level input voltage
Low level output voltage
High level input current
Low level input current
Under Voltage Lock Out
UVLO voltage
Master Clock
MCLK frequency
PWM Operation
PWM frequency range
FPR
0.5
-
2
MHz
MCLK
-5
-
5
%
MCLK = 400 kHz
VUVLO
1.6
-
2.2
V
VINH
VINL
VINOL
IINH
IINL
1.5
0
-
- 10
- 10
-
-
-
-
-
4.8
0.5
0.4
10
10
V
V
V
µA
µA
ICCST1
ICCST2
ICC
-
-
-
70
70
1.0
100
100
1.5
µA
µA
mA
PS bit = 0
Typ.
Max.
Unit
Datasheet
Conditions
DAC code = 0x000
IIN = + 3 mA (SDA)
Input voltage = 0.9 x VIN
Input voltage = 0.1 x VIN
2-wire serial adjustable
Default = 1 MHz
*5
10 Bit D/A Converter (for Controlling Output Current)
Resolution
Differential nonlinearity
Integral nonlinearity 1
Integral nonlinearity 2
Output Current Performance
Output maximum current
Zero code offset current
Output resistance
*5
DRES
DDNL
DINL1
DINL2
-
-1
-4
-4
10
-
-
-
-
1
4
4
bits
LSB
LSB
LSB
Linear operation
PWM operation
IOMAX
IOOFS
ROUT
95
-
-
100
0
2.5
105
5
3.5
mA
mA
Ω
DAC code = 0x3FF
DAC code = 0x000
Ron_Pch + RNF or
Ron_Nch + RNF
PWM frequency range : 500 kHz to 2 MHz. (50 kHz step)
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TSZ02201-0H2H0BZ00330-1-2
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BU64291GWZ
●Typical
Performance Curves
Datasheet
170
150
130
110
90
70
50
30
0
20
40
Time (ms)
60
80
Ta = - 25
℃
Ta = + 25
℃
Ta = + 85
℃
170
PWM 500 kHz
150
130
110
PWM 1 MHz
Displacement (µm)
Displacement (µm)
PWM 2 MHz
Linear
90
70
50
30
0
20
40
Time (ms)
60
80
VDD = 2.8 V
R = 24
Ω
L = 290 µH
Ta = + 25
℃
Figure 4. Output resistance (Ron_Pch + RNF)
Figure 5. Efficiency vs. Output current
100
90
80
Ta = - 25
℃
Output current (mA)
70
60
50
40
30
20
10
0
0
128
256
384
512
640
768
896 1024
DAC code
Ta = + 85
℃
Ta = + 25
℃
VDD = 3.0 V
Figure 6. Output current vs. DAC code
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© 2012 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/21
TSZ02201-0H2H0BZ00330-1-2
05.Oct.2012 Rev.002
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