DATASHEET
OSCAR™ USER CONFIGURABLE PECL CLOCK
Description
The ICS525-04 OSCaR
TM
is the most flexible way to
generate a high quality, high frequency differential PECL
clock output from a crystal or CMOS clock input. The name
OSCaR
TM
stands for Oscillator Replacement, as it is
designed to replace crystal oscillators in almost any
electronic system. Users can easily configure the device to
produce nearly any output frequency from any input
frequency by grounding or floating the select pins. Neither
microcontroller, software, nor device programmer are
needed to set the frequency. Using Phase Locked Loop
techniques, the device accepts a crystal or clock to produce
output clocks up to 156 MHz at 3.3V, keeping them
frequency locked together.
For simple multipliers to produce common frequencies,
refer to the LOCO
TM
family of parts, which are smaller and
more cost effective.
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined nor guaranteed. For
applications which require defined input to output timing,
use the ICS527-02.
ICS525-04
Features
•
Packaged as 28 pin SSOP (150 mil body)
•
Highly accurate frequency generation
•
User determines the output frequency by setting all
•
•
•
•
•
•
•
•
•
•
•
•
•
internal dividers
Eliminates need for custom oscillators
No software needed
Pull-ups on select inputs
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 156 MHz at 3.3V
Output clock frequencies up to 200 MHz at 5V
Very low jitter
PECL levels set by external resistors
Operating voltage of 3.3V or 5V
Ideal for oscillator replacement
Industrial temperature version available
Advanced, low power CMOS process
Block Diagram
560Ω
2
X1/ICLK
Crystal or
clock input
Crystal
Oscillator
X2
VCO
Divider
Reference
Divider
VDD
RES
VDD
VDD
82Ω
Phase Comparator,
Charge Pump, and
Loop Filter
PECL
VCO
Output
Divider
820Ω
GND
VDD
82Ω
PECL
820Ω
7
R6:R0
9
V8:V0
2
GND
3
S2:S0
GND
Optional crystal capacitors
IDT™ / ICS™
OSCAR™ USER CONFIGURABLE PECL CLOCK
1
ICS525-04
REV E 051310
ICS525-04
OSCAR™ USER CONFIGURABLE PECL CLOCK
PECL MULTIPLIER
Pin Assignment
R5
R6
S0
S1
S2
VDD
X1/ICLK
X2
GND
V0
V1
V2
V3
V4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
R4
R3
R2
R1
R0
VDD
PECL
PECL
GND
RES
V8
V7
V6
V5
28 pin 150 mil body SSOP
Maximum Output Frequency and Output Divider Table
S2
S1
S0 CLK Output
Pin 5 Pin 4 Pin 3
Divider
Max Output Frequency (MHz)
VDD = 5V
0 - 70
°
C
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
6
2
8
4
5
7
1
3
45
120
34
68
54
39
200
90
-40 - 85
°
C
44
117
33
66
53
38
195
89
27
81
20
40
32
23
162
54
VDD = 3.3V
0 - 70
°
C
-40 - 85
°
C
26
77
19
38
31
22
154
51
IDT™ / ICS™
OSCAR™ USER CONFIGURABLE PECL CLOCK
2
ICS525-04
REV E 051310
ICS525-04
OSCAR™ USER CONFIGURABLE PECL CLOCK
PECL MULTIPLIER
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
9
10 - 18
19
20
21
22
23
24
25
26
27
28
Pin
Name
R5
R6
S0
S1
S2
VDD
X1/ICLK
X2
GND
V0 - V8
RES
GND
PECL
PECL
VDD
R0
R1
R2
R3
R4
Pin
Type
Input
Input
Input
Input
Input
Power
Input
Input
Power
Input
Input
Power
Output
Output
Power
Input
Input
Input
Input
Input
Pin Description
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Select pins for output divider determined by user. See table above. Internal pull-up.
Select pins for output divider determined by user. See table above. Internal pull-up.
Select pins for output divider determined by user. See table above. Internal pull-up.
Connect to VDD.
Crystal connection. Connect to a parallel resonant crystal or input clock.
Crystal connection. Connect to a crystal or leave unconnected for clock.
Connect to ground.
VCO divider word input pins determined by user. Forms a binary number from 0 to
511. Internal pull-up.
Bias resistor input. Connect a resistor between this pin and VDD.
Connect to ground.
Complementary PECL output. Connect resistor load to this pin.
PECL output. Connect resistor load to this pin.
Connect to VDD.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
Reference divider word input pins determined by user. Forms a binary number from 0
to 127. Internal pull-up.
IDT™ / ICS™
OSCAR™ USER CONFIGURABLE PECL CLOCK
3
ICS525-04
REV E 051310
ICS525-04
OSCAR™ USER CONFIGURABLE PECL CLOCK
PECL MULTIPLIER
External Components
Decoupling Capacitors
As with any high performance mixed-signal IC, the
ICS525-04 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and the GND, one on each side of the
chip.The capacitor must be connected close to the device to
minimize lead inductance. No external power supply filtering
is required for this device.
The output of the ICS525-04 can be determined by the
following simple equation:
VDW + 8
-
PECL Frequency = Input Frequency
×
--------------------------------------------
(
RDW + 2
) •
OD
Where:
Reference Divider Word (RDW) = 0 to 127
VCO Divider Word (VDW) = 0 to 511
Output Divider (OD) = values on page 2
External Resistors
A 560Ω resistor must be connected between RES (pin 19)
and VDD. A total of four resistors are needed for the PECL
outputs as shown on the block diagram on page 1. The
value of these resistors are shown, but can be varied to
change the differential pair output swing and the common
mode voltage. Consult application note MAN09 for more
information.
Also, the following operating ranges should be observed:
VDW + 8
10M < Input Frequency
x
----------------------------- < 200M
(
5V
)or162M (
3.3v
) )
(
RDW + 2
)
Crystal Load Capacitors
The total on-chip capacitance for a crystal is approximately
16 pF, so a parallel resonant, fundamental mode crystal with
this value of load (correlation) capacitance should be used.
For crystals with a specified load capacitance greater than
16 pF, crystal capacitors may be connected from each of the
pins X1 and X2 to Ground as shown in the block diagram.
The value (in pF) of these crystal caps should be (CL -
16)*2, where CL is the crystal load capacitance. These
external capacitors are only required for applications where
the exact frequency is critical. For a clock input, connect to
X1 and leave X2 unconnected (no capacitors on either).
InputFrequency
200kHz < ----------------------------------------------
-
(
RDW + 2
)
See table on page 2 for full details of maximum output.
The dividers are expressed as integers. For example, if a
66.66 MHz output on CLK1 is desired from a 14.31818 MHz
input, the VCO divider word (VDW) should be 276, with an
output divide (OD) of 2. In this example, R6:R0 is 0111011,
V8:V0 is 100010100 and S2:S0 is 001. Since all of these
inputs have pull-up resistors, it is only necessary to ground
the zero pins, namely V7, V6, V5, V3, V1, V0, R6, R2, S2,
and S1.
To determine the best combination of VCO, reference, and
output divide, use the ICS525 Calculator on our web site:
www.idt.com. The online form is easy to use and quickly
shows you up to three options for these settings.
Determining the Output Frequency
Users have full control in setting the desired output
frequency over the range shown in the table on page 2. To
replace a standard oscillator, users should connect the
divider select input pins directly to ground (or VDD, although
this is not required because of internal pull-ups) during
Printed Circuit Board layout. The ICS525-04 will
automatically produce the correct clock when all
components are soldered. It is also possible to connect the
inputs to parallel I/O ports to switch frequencies. By
choosing divides carefully, the number of inputs which need
to be changed can be minimized. Observe the restrictions
on allowed values of VDW and RDW.
IDT™ / ICS™
OSCAR™ USER CONFIGURABLE PECL CLOCK
4
ICS525-04
REV E 051310
ICS525-04
OSCAR™ USER CONFIGURABLE PECL CLOCK
PECL MULTIPLIER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS525-04. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at
these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
7V
Rating
-0.5V to VDD+0.5V
-40 to +85° C
-65 to +150° C
175° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature, ICS525R-04
Ambient Operating Temperature, ICS525R-04I
Power Supply Voltage (measured in respect to GND)
Min.
0
-40
+3.0
Typ.
Max.
+70
+85
+5.5
Units
°
C
°
C
V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V ±10%, Ambient Temperature 0 to +70° C
Parameter
Operating Voltage
Supply Current
Symbol
VDD
IDD
Conditions
15 MHz in, 60MHz out,
no load
15MHz in, 60MHz out,
VDD = 5V
Min.
3.0
Typ.
34
60
Max.
5.5
Units
V
mA
mA
V
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Input Capacitance
On-chip pull-up resistor
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
C
IN
R
PU
X1/ICLK only
X1/ICLK only
I
OH
= -12 mA
I
OL
= 12 mA
V, R, S select pins
V, R, S select pins
2
0.8
VDD/2+1
V
V
VDD/2
VDD/2
VDD/2-1
V
V
2.4
0.4
5
270
V
pF
kΩ
IDT™ / ICS™
OSCAR™ USER CONFIGURABLE PECL CLOCK
5
ICS525-04
REV E 051310
京公网安备 11010802033920号
EEWORLD
