FINAL
Am27C64
64 Kilobit (8,192 x 8-Bit) CMOS EPROM
DISTINCTIVE CHARACTERISTICS
s
Fast access time
—
45 ns
s
Low power consumption
—
20
µA
typical CMOS standby current
s
JEDEC-approved pinout
s
Single +5 V power supply
s
±10%
power supply tolerance available
s
100% Flashrite
TM
programming
— Typical programming time of 1 second
Advanced
Micro
Devices
s
Latch-up protected to 100 mA from –1 V to
V
CC
+ 1 V
s
High noise immunity
s
Versatile features for simple interfacing
— Both CMOS and TTL input/output
compatibility
— Two line control functions
s
Standard 28-pin DIP, PDIP, and 32-pin PLCC
packages
GENERAL DESCRIPTION
The Am27C64 is a 64-Kbit ultraviolet erasable program-
mable read-only memory. It is organized as 8K words by
8 bits per word, operates from a single +5 V supply, has
a static standby mode, and features fast single address
location programming. Products are available in win-
dowed ceramic DIP packages as well as plastic one
time programmable (OTP) PDIP, and PLCC packages.
Typically, any byte can be accessed in less than 45 ns,
allowing operation with high-performance microproces-
sors without any WAIT states. The Am27C64 offers
separate Output Enable (OE) and Chip Enable (CE)
controls, thus eliminating bus contention in a multiple
bus microprocessor system.
AMD’s CMOS process technology provides high speed,
low power, and high noise immunity. Typical power con-
sumption is only 80 mW in active mode, and 100
µW
in
standby mode.
All signals are TTL levels, including programming sig-
nals. Bit locations may be programmed singly, in blocks,
or at random. The Am27C64 supports AMD’s Flashrite
programming algorithm (100
µs
pulses) resulting in a
typical programming time of 1 second.
BLOCK DIAGRAM
V
CC
V
SS
V
PP
Data Outputs
DQ0–DQ7
OE
CE
PGM
Output Enable
Chip Enable
and
Prog Logic
Y
Decoder
Output
Buffers
Y
Gating
A0–A12
Address
Inputs
X
Decoder
65,538
Bit Cell
Matrix
11419D-1
2-10
Publication#
11419
Rev.
D
Issue Date:
May 1995
Amendment
/0
AMD
FUNCTIONAL DESCRIPTION
Erasing the Am27C64
In order to clear all locations of their programmed con-
tents, it is necessary to expose the Am27C64 to an
ultraviolet light source. A dosage of 15 W seconds/cm
2
is
required to completely erase an Am27C64. This dosage
can be obtained by exposure to an ultraviolet lamp—
°
wavelength of 2537 A—with intensity of 12,000
µW/cm
2
for 15 to 20 minutes. The Am27C64 should be directly
under and about one inch from the source and all filters
should be removed from the UV light source prior
to erasure.
It is important to note that the Am27C64 and similar
devices will erase with light sources having wavelengths
°
shorter than 4000 A. Although erasure times will be
°
much longer than with UV sources at 2537 A, exposure
to fluorescent light and sunlight will eventually erase the
Am27C64 and exposure to them should be prevented to
realize maximum system reliability. If used in such an
environment, the package window should be covered
by an opaque label or substance.
PGM
input with V
PP
= 12.75 V
±
0.25 V and
CE
Low will
program that Am27C64. A high-level
CE
input inhibits
the other Am27C64 devices from being programmed.
Program Verify
A verify should be performed on the programmed bits to
determine that they were correctly programmed. The
verify should be performed with
OE
and
CE
at V
IL
,
PGM
at V
IH,
and V
PP
between 12.5 V and 13.0 V.
Auto Select Mode
The auto select mode allows the reading out of a binary
code from an EPROM that will identify its manufacturer
and type. This mode is intended for use by programming
equipment for the purpose of automatically matching
the device to be programmed with its corresponding
programming algorithm. This mode is functional in the
25°C
±
5°C ambient temperature range that is required
when programming the Am27C64.
To activate this mode, the programming equipment
must force 12.0 V
±
0.5 V on address line A9 of the
Am27C64. Two identifier bytes may then be sequenced
from the device outputs by toggling address line A0 from
V
IL
to V
IH
. All other address lines must be held at V
IL
dur-
ing auto select mode.
Byte 0 (A
0
= V
IL
) represents the manufacturer code, and
byte 1 (A
0
= V
IH
), the device code. For the Am27C64,
these two identifier bytes are given in the Mode Select
Table. All identifiers for manufacturer and device codes
will possess odd parity, with the MSB (DQ7) defined as
the parity bit.
Programming the Am27C64
Upon delivery or after each erasure the Am27C64
has all 65,536 bits in the “ONE” or HIGH state. “ZEROs”
are loaded into the Am27C64 through the procedure
of programming.
The programming mode is entered when 12.75 V
±
0.25 V is applied to the V
PP
pin,
CE
is at V
IL
and
PGM
is
at V
IL
.
For programming, the data to be programmed is applied
8 bits in parallel to the data output pins.
The Flashrite algorithm reduces programming time by
using 100
µs
programming pulses and by giving each
address only as many pulses as is necessary in order to
reliably program the data. After each pulse is applied to
a given address, the data in that address is verified. If
the data does not verify, additional pulses are given until
it verifies or the maximum is reached. This process is
repeated while sequencing through each address of the
Am27C64. This part of the algorithm is done at
V
CC
= 6.25 V to assure that each EPROM bit is pro-
grammed to a sufficiently high threshold voltage. After
the final address is completed, the entire EPROM mem-
ory is verified at V
CC
= V
PP
= 5.25 V.
Please refer to Section 6 for programming flow chart
and characteristics.
Read Mode
The Am27C64 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to
the output pins, independent of device selection. As-
suming that addresses are stable, address access time
(t
ACC
) is equal to the delay from
CE
to output (t
CE
). Data
is available at the outputs t
OE
after the falling edge of
OE,
assuming that
CE
has been LOW and addresses
have been stable for at least tACC–tOE.
Standby Mode
The Am27C64 has a CMOS standby mode which re-
duces the maximum V
CC
current to 100
µA.
It is placed in
CMOS-standby when
CE
is at V
CC
±
0.3 V. The
Am27C64 also has a TTL-standby mode which reduces
the maximum V
CC
current to 1.0 mA. It is placed in
TTL-standby when
CE
is at V
IH
. When in standby mode,
the outputs are in a high-impedance state, independent
of the
OE
input.
Program Inhibit
Programming of multiple Am27C64 in parallel with dif-
ferent data is also easily accomplished. Except for
CE,
all like inputs of the parallel Am27C64 may be common.
A TTL low-level program pulse applied to an Am27C64
2-14
Am27C64
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
