Preface
The H8/538 and H8/539 are original Hitachi high-performance single-chip microcontrollers with a
high-speed 16-bit H8/500 CPU core and extensive on-chip peripheral functions. They are suitable
for controlling a wide range of medium-scale office and industrial equipment and consumer
products.
The general-register architecture and highly orthogonal, optimized instruction set of the H8/500
CPU enable even programs coded in the high-level C language to be compiled into efficient object
code.
Many of the peripheral functions needed in microcontroller application systems are provided on-
chip, including large RAM and ROM, a powerful set of timers, a serial interface, a high-precision
A/D converter, and I/O ports. Compact, high-performance systems can be implemented easily.
The H8/538 and H8/539 are available with mask-programmable ROM for full-scale volume
production, and in ZTAT™ (zero turn-around time) versions with on-chip PROM for products
with frequent design changes, or for the early stages of volume production.
This document describes the H8/538 and H8/539 hardware. For further details about the H8/500
CPU instruction set, refer to the
H8/500 Series Programming Manual.
Note: ZTAT™ is a registered trademark of Hitachi, Ltd.
Contents
Section 1
1.1
1.2
1.3
Overview
.......................................................................................................
Features ..........................................................................................................................
Block Diagram ...............................................................................................................
Pin Descriptions .............................................................................................................
1.3.1 Pin Arrangement ..............................................................................................
1.3.2 Pin Functions ....................................................................................................
1
1
5
7
7
9
Section 2
2.1
Operating Modes
........................................................................................ 21
21
21
22
23
24
24
24
24
24
24
24
25
26
26
28
2.2
2.3
2.4
2.5
Overview ........................................................................................................................
2.1.1 Selection of Operating Mode ...........................................................................
2.1.2 Register Configuration .....................................................................................
Mode Control Register ..................................................................................................
Operating Mode Descriptions ........................................................................................
2.3.1 Mode 1 (Expanded Minimum Mode) ..............................................................
2.3.2 Mode 2 (Expanded Minimum Mode) ..............................................................
2.3.3 Mode 3 (Expanded Maximum Mode) ..............................................................
2.3.4 Mode 4 (Expanded Maximum Mode) ..............................................................
2.3.5 Modes 5 and 6 ..................................................................................................
2.3.6 Mode 7 (Single-Chip Mode) ............................................................................
Pin Functions in Each Operating Mode .........................................................................
Memory Map in Each Mode ..........................................................................................
2.5.1 H8/538 Memory Maps ......................................................................................
2.5.2 H8/539 Memory Maps ......................................................................................
Section 3
3.1
CPU
................................................................................................................ 31
31
31
32
34
35
35
35
35
35
36
36
36
36
37
3.2
3.3
Overview ........................................................................................................................
3.1.1 Features ............................................................................................................
3.1.2 Address Space ..................................................................................................
3.1.3 Programming Model ........................................................................................
General Registers ...........................................................................................................
3.2.1 Overview ..........................................................................................................
3.2.2 Register Configuration .....................................................................................
3.2.3 Stack Pointer ....................................................................................................
3.2.4 Frame Pointer ...................................................................................................
Control Registers ...........................................................................................................
3.3.1 Overview ..........................................................................................................
3.3.2 Register Configuration .....................................................................................
3.3.3 Program Counter ..............................................................................................
3.3.4 Status Register ..................................................................................................
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