CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
TABLE 1. DC ELECTRICAL PERFORMANCE SPECIFICATIONS
PARAMETER
Logical One Input
Voltage
Logical Zero Input
Voltage
Output HIGH Voltage
Output LOW Voltage
Input Leakage Current
Output or I/O Leakage
Current
Standby Power Supply
Current
Operating Power Supply
Current
SYMBOL
V
IH
V
IL
V
OH
V
OL
I
I
I
O
I
CCSB
TEST CONDITIONS
V
CC
= 5.5V
V
CC
= 4.5V
I
OH
= 400µA
V
CC
= 4.5V (Note 2)
I
OL
= +4.0mA
V
CC
= 4.5V (Note 2)
V
IN
= V
CC
or GND
V
CC
= 5.5V
V
OUT
= V
CC
or GND
V
CC
= 5.5V
V
IN
= V
CC
or GND,
V
CC
= 5.5V, Outputs
Open
f = 1.0 MHz,
V
IN
= V
CC
or GND
V
CC
= 5.5V
(Note 3)
(Note 4)
GROUP A
SUBGROUPS
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
TEMPERATURE
(
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
MIN
2.2
-
2.6
-
-10
-10
-
MAX
-
0.8
-
0.4
+10
+10
500
UNITS
V
V
V
V
µA
µA
µA
I
CCOP
1, 2, 3
-55
≤
T
A
≤
125
-
7.0
mA
Functional Test
NOTES:
FT
7, 8
-55
≤
T
A
≤
125
-
-
2. Interchanging of force and sense conditions is permitted.
3. Operating Supply Current is proportional to frequency, typical rating is 5mA/MHz.
4. Tested as follows: f = 1MHz, V
IH
(Clock Inputs) = 3.0, V
IH
(All other inputs) = 2.6, V
IL
= 0.4, V
OH
≥
1.5V, and V
OL
≤
1.5V.
3-37
HMU17/883
TABLE 2. AC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
GROUP
A
SUB-
GROUP
S
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
(Note 6)
9, 10, 11
9, 10, 11
-45
-60
PARAMETER
Unclocked Multiply Time
Clocked Multiply Time
X, Y, RND Setup Time
Clock HIGH Pulse Width
Clock LOW Pulse Width
MSPSEL to Product Out
Output Clock to P
Output Clock to Y
Three-State Enable
Time
Clock Enable Setup
SYMBOL
t
MUC
t
MC
t
S
t
PWH
t
PWL
t
PDSEL
t
PDP
t
PDY
t
ENA
t
SE
(NOTE 1)
CONDI-
TIONS
TEMPERATURE
(
o
C)
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
MIN
-
-
18
15
15
-
-
-
-
15
MAX
70
45
-
-
-
25
25
25
25
-
MIN
-
-
20
20
20
-
-
-
-
15
MAX
90
60
-
-
-
30
30
30
30
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
5. AC Testing as follows: V
CC
= 4.5V and 5.5V. Input levels 0V and 3.0V; Timing reference levels = 1.5V; output load per test load
circuit, with V
1
= 2.4V, R
1
= 500Ω and C
L
= 40pF.
6. Transition is measured at
±200mV
from steady state voltage, output loading per test load circuit, with V
1
= 1.5V, R
1
= 500Ω and
C
L
= 40pF.
TABLE 3. ELECTRICAL PERFORMANCE SPECIFICATIONS
-45
PARAMETER
Input Capacitance
Output Capacitance
I/O Capacitance
X, Y, RND Hold Time
Three-State Disable
Time
Clock Enable Hold
Time
Output Rise Time
Output Fall Time
NOTES:
7. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested. These parameters are char-
acterized upon initial design and after major process and/or design changes.
8. Guaranteed, but not 100% tested.
9. Transition is measured at
±200mV
from steady state voltage; output loading per test load circuit; with V
1
= 1.5V, R
1
= 500Ω and C
L
= 40pF.
10. Loading is as specified in the test load circuit, with V
1
= 2.4V, R
1
= 500Ω and C
L
= 40pF.
SYMBOL
C
IN
C
OUT
C
I/O
t
H
t
DIS
t
HE
t
R
t
F
From 0.8V to 2.0V
From 2.0V to 0.8V
CONDITIONS
V
CC
= Open,
f = 1MHz
All Measurements
are referenced to
device GND.
NOTES
7
7
7
7, 8
7, 8, 9
7, 8, 9
7, 8, 10
7, 8, 10
TEMPERATURE (
o
C)
T
A
= 25
T
A
= 25
T
A
= 25
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
-55
≤
T
A
≤
125
MIN
-
-
-
3
-
3
-
-
MAX
15
10
10
-
25
-
10
10
MIN
-
-
-
3
-
3
-
-
-60
MAX
15
10
10
-
30
-
10
10
UNITS
pF
pF
pF
ns
ns
ns
ns
ns
3-38
HMU17/883
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
Initial Test
Interim Test
PDA
Final Test
Group A
Groups C & D
METHOD
100%/5004
100%/5004
100%
100%
-
Samples/5005
SUBGROUPS
-
-
1
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 7, 9
3-39
HMU17/883
Burn-In Circuit
11
N/C
X13
X15
RND
TCY
V
CC
GND
MSP
SEL
FT
OEP
10
X11
X12
X14
(ENX)
TCX
V
CC
GND
FA
(ENP)
P30/
P14
P28/
P12
P26/
P10
N/C
P31/
P15
P29/
P13
P27/
P11
P25/
P9
P23/
P7
P21/
P5
P19/
P3
P17/
P1
9
X9
X10
8
X7
X8
7
X5
X6
6
X3
X4
68 LEAD
PIN GRID ARRAY
TOP VIEW
P24/
P8
P22/
P6
P20/
P4
P18/
P2
5
X1
X2
4
OEL
X0
3
(ENY)
CLK
Y10/
P10
Y11/
P11
G
Y12/
P12
Y13/
P13
H
Y14/
P14
Y15/
P15
J
2
N/C
Y0/P0
Y2/P2 Y4/P4
Y6/P6 Y8/P8
P16/
P0
N/C
K
1
A
Y1/P1
B
Y3/P3 Y5/P5
C
D
Y7/P7 Y9/P9
E
F
L
PGA
PIN
B6
A6
B5
A5
B4
A4
B3
A3
B2
B1
C2
C1
D2
D1
E2
E1
F2
NOTES:
PIN
NAME
X4
X3
X2
X1
X0
OEL
CLK
ENY
Y0/P0
Y1/P1
Y2/P2
Y3/P3
Y4/P4
Y5/P5
Y6/P6
Y7/P7
Y8/P8
BURN-IN
SIGNAL
F6
F5
F4
F3
F2
V
CC
F0
F0
F2
F3
F4
F5
F6
F7
F8
F9
F10
PGA
PIN
F1
G2
G1
H2
H1
J2
J1
K2
L2
K3
L3
K4
L4
K5
L5
K6
L6
PIN
NAME
Y9/P9
Y10/P10
Y11/P11
Y12/P12
Y13/P13
Y14/P14
Y15/P15
P0/P16
P1/P17
P2/P18
P3/P19
P4/P20
P5/P21
P6/P22
P7/P23
P8/P24
P9/P25
BURN-IN
SIGNAL
F11
F12
F13
F14
F15
F4
F5
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
PGA
PIN
K7
L7
K8
L8
K9
L9
K10
K11
J10
J11
H10
H11
G10
G11
F10
F11
E10
PIN
NAME
P10/P26
P11/P27
P12/P28
P13/P29
P14/P30
P15/P31
ENP
OEP
FA
FT
MSPSEL
GND
GND
V
CC
V
CC
TCY
TCX
BURN-IN
SIGNAL
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
V
CC
/2
F0
F1
F14
F15
F14
GND
GND
V
CC
V
CC
F15
F15
PGA
PIN
E11
D10
D11
C10
C11
B10
A10
B9
A9
B8
A8
B7
A7
A2
K1
L10
B11
PIN
NAME
RND
ENX
X15
X14
X13
X12
X11
X10
X9
X8
X7
X6
X5
N.C.
N.C.
N.C.
N.C.
BURN-IN
SIGNAL
F1
F0
F3
F2
F15
F14
F13
F12
F11
F10
F9
F8
F7
NONE
NONE
NONE
NONE
11. V
CC
= 5.0V +0.5V/-0.0V with 0.1µF decoupling capacitor to GND.
12. F
0
= 100kHz, F1 = F0/2, F2 = F1/2, . . . . . . . . .
13. V
IH
= V
CC
1V
±0.5V
(Min), V
IL
= 0.8V (Max).
14. 47kΩ load resistors used on all pins except V
CC
and GND (Pin Grid identifiers F10, G10, G11 and H11).
Circuit diagram: as followsThis circuit has been adjusted with resistance parameters, etc.:
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