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HCPL-2200#500

Description
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 2.5 Mbps, SURFACE MOUNT, DIP-8
CategoryLED optoelectronic/LED    photoelectric   
File Size410KB,12 Pages
ManufacturerHP(Keysight)
Websitehttp://www.semiconductor.agilent.com/
Download Datasheet Parametric View All

HCPL-2200#500 Overview

1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 2.5 Mbps, SURFACE MOUNT, DIP-8

HCPL-2200#500 Parametric

Parameter NameAttribute value
MakerHP(Keysight)
package instructionSURFACE MOUNT, DIP-8
Reach Compliance Codeunknown
Other featuresCMOS COMPATIBLE, UL RECOGNIZED, TRI STATE
ConfigurationSINGLE
Nominal data rate2.5 MBps
Maximum forward current0.005 A
Nominal hysteresis ratio0.02
Maximum insulation voltage3750 V
Number of components1
Maximum on-state current0.025 A
Maximum operating temperature85 °C
Minimum operating temperature
Optoelectronic device typesLOGIC IC OUTPUT OPTOCOUPLER
Minimum supply voltage4.5 V
Base Number Matches1
Low Input Current Logic Gate
Optocouplers
Technical Data
HCPL-2200
HCPL-2219
Features
• 2.5 kV/
µ
s Minimum Common
Mode Rejection (CMR) at
V
CM
= 400 V (HCPL-2219)
• Compatible with LSTTL,
TTL, and CMOS Logic
• Wide V
CC
Range (4.5 to 20 V)
• 2.5 Mbd Guaranteed over
Temperature
• Low Input Current (1.6 mA)
• Three State Output (No
Pullup Resistor Required)
• Guaranteed Performance
from 0
°
C to 85
°
C
• Hysteresis
• Safety Approval
UL Recognized -3750 V rms
for 1 minute
CSA Approved
IEC/EN/DIN EN 60747-5-2
Approved with
V
IORM
= 630 V
peak
(HCPL-2219 Option 060
Only)
• MIL-PRF-38534 Hermetic
Version Available (HCPL-
5200/1)
• Microprocessor System
Interfaces
• Ground Loop Elimination
• Pulse Transformer
Replacement
• Isolated Buss Driver
• High Speed Line Receiver
Description
The HCPL-2200/2219 are
optically coupled logic gates that
combine a GaAsP LED and an
integrated high gain photo
detector. The detector has a three
state output stage and has a
detector threshold with hysteresis.
The three state output eliminates
the need for a pullup resistor and
allows for direct drive of data
busses. The hysteresis provides
differential mode noise immunity
and eliminates the potential for
output signal chatter.
A superior internal shield on the
HCPL-2219 guarantees common
mode transient immunity of
2.5 kV/µs at a common mode
voltage of 400 volts.
Functional Diagram
NC 1
ANODE 2
CATHODE 3
NC 4
8 V
CC
7 V
O
6 V
E
5 GND
TRUTH TABLE
(POSITIVE LOGIC)
ENABLE
OUTPUT
LED
H
ON
Z
H
OFF
Z
L
ON
H
L
OFF
L
SHIELD
Applications
• Isolation of High Speed
Logic Systems
• Computer-Peripheral
Interfaces
A 0.1
µ
F bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this
component to prevent damage and/or degradation which may be induced by ESD.
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