Preliminary Target Datasheet Specification
LX8204
3.5A 12V E-Fuse with Hot-Swap and
Voltage Surge Protection
Description
The LX8204 is a fast acting eFuse switch designed
both to protect circuitry connected to its output
(VOUT) from transient input voltage surges on its
input (VCC), and to protect VCC from overload
current events coming from the load on VOUT.
Voltage protection features include under-voltage
lockout (UVLO), and over-voltage clamping. This
clamp limits VOUT voltage allowing continued circuit
operation during an input over-voltage transient
condition, while UVLO ensures that VOUT remains
off until VCC reaches its minimum operating
threshold. On the current side, the LX8204 protects
the input from a output short circuit and/or over
current condtion with a 2-3.5A current limit circuit.
Additionaly, the LX8204 protects the subsequent
systems from hot-swap condition.
Another protection feature is latching thermal
shutdown of VOUT, with a fault flag output on the
combined EN/FAULT pin. Once thermal shutdown
threshold is reached and the eFuse switch opens,
the tristate EN/FAULT pin will be pulled to about
1.6V signaling to the system and potentially other
connected eFuse switches that a fault has occurred.
Features
Protected from Hot-Swap Condition.
50m(typ.) Rdson Internal eFuse FET
protected from 24V
Up to 24V Transient Input Range
< 15V Output Voltage Clamp including
dynamic transient
Continuous operation during VCC surge
2A-3.5A Current Limit at overloading
Over-Temperature Protection
13mS and 1.4ms/3.5mS soft start rise time
Current limit during Vout softstart
UVLO detection
3mm x 3mm DFN available
Applications
Hard-Disk Drive
Solid-State Drive
Hot Swap
PC Cards
HOST
+12V
0.1uF
5V Bus
VCC
LX8204
VOUT
33uF
HOST
+12V
0.1uF
5V Bus
VCC
LX8204
VOUT
33uF
EN/FAULT
RT
EN/FAULT
RT
Soft Start= 1.4ms/3.5ms
+5V
0.1uF
VCC
+5V
0.1uF
VCC
Soft Start= 13ms
LX8233
DEVSLP
DEVSLP
VOUT
5V Bus
VCC_12V
VCC_5V
V1P8
SOC/
PMIC
DEVSLPOUTB
FET_ON
DEVSLP
DEVSLP
LX8233
VOUT
VCC_12V
5V Bus
VCC_5V
V1P8
SOC/
PMIC
33uF
EN/FAULT
DEVSLPOUTB
FET_ON
GND
33uF
EN/FAULT
DEVSLPOUTB
FET_ON
GND
Figure 1 ·
Typical Application of LX8204
Feb 27, 2015 Rev. 0.40
www.microsemi.com
© 2015 Microsemi Corporation
1
Pin Description
Pin Description
Pin
Number
1,2,3,4,5
Pin Designator
Input/
Output
Description
VOUT
Output
Output of the device, connect to circuitry to be protected.
When RT is floating, the VOUT rise time will be 13ms.
When RT is grounded, the VOUT rise time will be longer than 1.4ms or
3.5ms.
LX8204-1yy: 1.4ms VOUT rise time.
LX8204-3yy: 3.5ms VOUT rise time.
Do Not Connect.
The EN/FAULT pin is a tri−state, bidirectional interface. It can be used to
disable the output of the device by pulling it to ground using an open drain
or open collector device. If a thermal fault occurs, the voltage on this pin will
go to an intermediate state to signal a monitoring circuit that the device is in
thermal shutdown. It can also be connected to another device in this family
to cause a simultaneous shutdown during thermal events.
Symbol
Description
Under Voltage Lock Out. This
UVLO condition must be applied
even VCC is under Hi-Z or
grounded.
Thermal Shutdown
Vcc>UVLO, No Fault
EN/FAULT
VL
eFuse State
Off
Latching
No
6
RT
Input
7,9
NC1,2
-
8
EN/FAULT
Input/Output
UVLO
THsd
VM
VH
Off
On
Yes
n/a
10
11*
(exposed
pad)
GND
VCC
-
Input
Ground Pin
Input of the device. Positive input to the device (Bottom exposed pad)
3
Absolute Maximum Ratings
Absolute Maximum Ratings
Parameter
VCC to GND (Steady-State)
VCC to GND (Transient 100ms)
EN/FAULT to GND
ESD (Human Body Model)
ESD (Charged Device Model)
Power Dissipation
Storage Temperature
-65
Min
-0.6
-0.6
-0.3
2000
1000
2.5
150
Max
18
25
6
Units
V
V
V
V
V
W
°C
Note:
Performance is not necessarily guaranteed over this entire range. These are maximum stress ratings only.
Exceeding these ratings, even momentarily, can cause immediate damage, or negatively impact long-term
operating reliability
Operating Ratings
Min
VCC
I(VCC)
Junction Temperature
-40
10.8
Typ
12
Max
13.2
3.5
125
Units
V
A
°C
Note:
Performance is generally guaranteed over this range as further detailed below under Electrical
Characteristics.
Thermal Properties
Thermal Resistance
θ
JA
Typ
50
Units
°C/W
Note:
The
JA
numbers assume no forced airflow. Junction Temperature is calculated using T
J
= T
A
+ (PD x
JA
). In
particular, θ
JA
is a function of the PCB construction. The stated number above is for a four-layer board in
accordance with JESD-51 (JEDEC).
5
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