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5962-9315502HYX

Description
EEPROM Module, 256KX8, 150ns, Parallel, CMOS, CDIP32, HERMETIC SEALED, BOTTOM BRAZED, CERAMIC, DIP-32
Categorystorage    storage   
File Size678KB,13 Pages
ManufacturerMicrosemi
Websitehttps://www.microsemi.com
Download Datasheet Parametric View All

5962-9315502HYX Overview

EEPROM Module, 256KX8, 150ns, Parallel, CMOS, CDIP32, HERMETIC SEALED, BOTTOM BRAZED, CERAMIC, DIP-32

5962-9315502HYX Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerMicrosemi
Parts packaging codeDIP
package instructionDIP,
Contacts32
Reach Compliance Codecompliant
ECCN code3A001.A.2.C
Maximum access time150 ns
JESD-30 codeR-CDIP-T32
JESD-609 codee4
length40.6 mm
memory density2097152 bit
Memory IC TypeEEPROM MODULE
memory width8
Number of functions1
Number of terminals32
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize256KX8
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Programming voltage5 V
Certification statusNot Qualified
Filter levelMIL-PRF-38534 Class H
Maximum seat height5.1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width15.24 mm
Maximum write cycle time (tWC)10 ms
Base Number Matches1
White Electronic Designs
WE512K8, WE256K8,
WE128K8-XCX
512Kx8 CMOS EEPROM, WE512K8-XCX, SMD 5962-93091
512Kx8 BIT CMOS EEPROM MODULE
FEATURES
Read Access Times of 150, 200, 250, 300ns
JEDEC Standard 32 Pin, Hermetic Ceramic DIP
(Package 300)
Commercial, Industrial and Military Temperature
Ranges
MIL-STD-883 Compliant Devices Available
Write Endurance 10,000 Cycles
Data Retention at 25°C, 10 Years
Low Power CMOS Operation:
3mA Standby Typical/100mA Operating Maximum
Automatic Page Write Operation
Internal Address and Data Latches for
512 Bytes, 1 to 128 Bytes/Row, Four Pages
Page Write Cycle Time 10mS Max.
Data Polling for End of Write Detection
Hardware and Software Data Protection
TTL Compatible Inputs and Outputs
FIGURE 1
Pin Configuration
Top View
A18
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
WE#
A17
A14
A13
A8
A9
A11
OE#
A10
CS#
I/O7
I/O6
I/O5
I/O4
I/O3
Pin Description
A0-18
I/O0-7
CS#
OE#
WE#
V
CC
V
SS
Address Inputs
Data Input/Output
Chip Select
Output Enable
Write Enable
+5.0V Power
Ground
Block Diagram
A
0-16
I/O
0-7
WE#
OE#
128K x 8
128K x 8
128K x 8
128K x 8
A
17
A
18
CS#
Decoder
White Electronic Designs Corp. reserves the right to change products or specifications without notice.
March 2007
Rev. 2
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
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