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M29F002BB120P3

Description
2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory
Categorystorage    storage   
File Size144KB,22 Pages
ManufacturerSTMicroelectronics
Websitehttp://www.st.com/
Environmental Compliance
Download Datasheet Parametric View All

M29F002BB120P3 Overview

2 Mbit 256Kb x8, Boot Block Single Supply Flash Memory

M29F002BB120P3 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerSTMicroelectronics
Parts packaging codeDIP
package instruction0.600 INCH, PLASTIC, DIP-32
Contacts32
Reach Compliance Codecompli
ECCN codeEAR99
Maximum access time70 ns
Other featuresBOTTOM BOOT BLOCK
startup blockBOTTOM
command user interfaceYES
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PDIP-T32
JESD-609 codee3
length41.91 mm
memory density2097152 bi
Memory IC TypeFLASH
memory width8
Number of functions1
Number of departments/size1,2,1,3
Number of terminals32
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
organize256KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP32,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height5.08 mm
Department size16K,8K,32K,64K
Maximum standby current0.0001 A
Maximum slew rate0.02 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceMatte Tin (Sn)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
switch bitYES
typeNOR TYPE
width15.24 mm
M29F002BT, M29F002BNT
M29F002BB, M29F002BNB
2 Mbit (256Kb x8, Boot Block) Single Supply Flash Memory
s
SINGLE 5V ± 10% SUPPLY VOLTAGE for
PROGRAM, ERASE and READ OPERATIONS
ACCESS TIME: 45 ns
PROGRAMMING TIME
– 8 µs by Byte typical
7 MEMORY BLOCKS
– 1 Boot Block (Top or Bottom Location)
– 2 Parameter and 4 Main Blocks
PLCC32 (K)
TSOP32 (N)
8 x 20mm
s
s
s
s
PROGRAM/ERASE CONTROLLER
– Embedded Byte Program algorithm
– Embedded Multi-Block/Chip Erase algorithm
– Status Register Polling and Toggle Bits
32
s
ERASE SUSPEND and RESUME MODES
– Read and Program another Block during
Erase Suspend
1
PDIP32 (P)
s
UNLOCK BYPASS PROGRAM COMMAND
– Faster Production/Batch Programming
TEMPORARY BLOCK UNPROTECTION
MODE
LOW POWER CONSUMPTION
– Standby and Automatic Standby
VCC
s
Figure 1. Logic Diagram
s
s
100,000 PROGRAM/ERASE CYCLES per
BLOCK
20 YEARS DATA RETENTION
– Defectivity below 1 ppm/year
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Top Device Code M29F002BT: B0h
– Top Device Code M29F002BNT: B0h
– Bottom Device Code M29F002BB: 34h
– Bottom Device Code M29F002BNB: 34h
G
RP
A0-A17
W
E
18
8
DQ0-DQ7
M29F002BT
M29F002BB
M29F002BNT
M29F002BNB
s
s
VSS
AI02957B
April 2002
1/22
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