840S05AYILFT datasheet, PDF - EEWORLD Datasheet

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840S05AYILFT: DescriptionClock Generator, 200MHz, PQFP32, 7 X 7 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ABA-HD, TQFP-32; CategoryThe embedded processor and controller Microcontrollers and processors; File Size351KB，21 Pages; ManufacturerIDT (Integrated Device Technology); Environmental Compliance

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840S05AYILFT Overview

Clock Generator, 200MHz, PQFP32, 7 X 7 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ABA-HD, TQFP-32

840S05AYILFT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	IDT (Integrated Device Technology)
Parts packaging code	QFP
package instruction	TQFP,
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	S-PQFP-G32
JESD-609 code	e3
length	7 mm
Humidity sensitivity level	3
Number of terminals	32
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	200 MHz
Package body material	PLASTIC/EPOXY
encapsulated code	TQFP
Package shape	SQUARE
Package form	FLATPACK, THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	25 MHz
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage	3.465 V
Minimum supply voltage	3.135 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn) - annealed
Terminal form	GULL WING
Terminal pitch	0.8 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	30
width	7 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, OTHER
Base Number Matches	1

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Crystal-to-LVCMOS/LVTTL

Frequency Synthesizer

Data Sheet

840S05I

General Description

The 840S05I is a five output LVCMOS/LVTTL Frequency

Synthesizer accepting crystal or single-ended reference clock

inputs. The 840S05I uses a 25MHz parallel resonant crystal to

generate 33.33MHz – 166.67MHz clock signals, replacing solutions

requiring multiple oscillator and fan-out buffer solution. The device

supports output slew rate control with two slew select pins

(SLEW[1:0]). The VCO operates at a frequency of 2GHz. The device

has 2 output banks, Bank A with two 33.33MHz – 166.67MHz

LVCMOS/LVTTL outputs and Bank B with two 33.33MHz –

166.67MHz LVCMOS/LVTTL outputs.

The two banks have their own dedicated frequency select pins and

can be independently set for frequencies in the ranges mentioned

above. Designed for networking and industrial applications, the

840S05I can also drive the high-speed clock inputs of

communication processors, DSPs, switches and bridges.

Features

•

Four single-ended LVCMOS/LVTTL clock outputs

One REF_OUT LVCMOS/LVTTL clock output

Selectable crystal oscillator interface, 25MHz, 18pF parallel

resonant crystal or LVCMOS/LVTTL single-ended reference input

Supports the following output frequencies on either bank:

33.33MHz, 50MHz, 66.67MHz, 83.33MHz, 100MHz, 125MHz,

133.33MHz, and 166.67MHz

VCO: 2GHz

Slew rate control

Output supply modes:

Core/Output

3.3V/3.3V

3.3V/2.5V

-40°C to 85°C ambient operating temperature

Lead-free (RoHS 6) packaging

Block Diagram

F_SELA[0,

Pullup

F_SELA1

Pulldown

25MHz

Pin Assignment

DDO_A

GND

QA0

QA1

QB0

DDO_B

GND

QB1

QA0

÷NA

QA1

XTAL_IN

GND

QB0

24 23 22 21 20 19 18 17

DDA

XTAL_OUT

XTAL_IN

GND

REF_SEL

REF_IN

F_SELB2

F_SELB0

MR/nOE

F_SELB1

GND

REF_OUT

DDO_REF

nREF_OE

OSC

XTAL_OUT

PLL

VCO

2GHz

÷NB

QB1

F_SELA0

F_SELA1

SLEW0

SLEW1

F_SELA2

REF_IN

Pulldown

REF_SEL

Pulldown

M =

SLEW[1:0]

Pulldown

MR/nOE

Pulldown

F_SELB[2:0]

Pulldown

nREF_OE

Pullup

REF_OUT

840S05I

32-Lead TQFP, E-Pad

7mm x 7mm x 1mm package body

Y Package

Top View

Revision A April 11, 2016

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