M24C16-W M24C16-R M24C16-F
Datasheet
16-Kbit serial I2C bus EEPROM
Features
•
SO8 (MN)
TSSOP8 (DW)
169 mil width
150 mil width
•
•
UFDFPN8 (MC)
DFN8 - 2x3 mm
•
UFDFPN5 (MH)
DFN5 - 1.7x1.4 mm
•
•
•
•
•
•
Unsawn wafer
Product status link
M24C16-W
M24C16-R
M24C16-F
Compatible with following I
2
C bus modes:
–
400 kHz
–
100 kHz
Memory array:
–
16 Kbit (2 Kbyte) of EEPROM
–
Page size: 16 byte
Single supply voltage:
–
M24C16-W: 2.5 V to 5.5 V
–
M24C16-R: 1.8 V to 5.5 V
–
M24C16-F: 1.7 V to 5.5 V (full temperature range) and 1.6 V to 1.7 V
(limited temperature range)
Write:
–
Byte Write within 5 ms
–
Page Write within 5 ms
Operating temperature range:
–
from -40 ° C up to +85 ° C
Random and sequential Read modes
Write protect of the whole memory Array
Enhanced ESD/Latch-Up protection
More than 4 million Write cycles
More than 200-years data retention
Packages
•
•
•
•
•
SO8 ECOPACK2
TSSOP8 ECOPACK2
UFDFPN8 ECOPACK2
UFDFPN5 ECOPACK2
Unsawn wafer (each die is tested)
DS9194
-
Rev 10
-
June 2020
For further information contact your local STMicroelectronics sales office.
www.st.com
M24C16-W M24C16-R M24C16-F
Description
1
Description
The M24C16 is a 16-Kbit I
2
C-compatible EEPROM (electrically erasable programmable memory) organized as
2K x 8 bits.
The M24C16-W can be accessed (Read and Write) with a supply voltage from 2.5 V to 5.5 V, the M24C16-R can
be accessed (Read and Write) with a supply voltage from 1.8 V to 5.5 V, and the M24C16-F can be accessed
either with a supply voltage from 1.7 V to 5.5 V (over the full temperature range) or with an extended supply
voltage from 1.6 V to 1.7 V. All these devices operate with a clock frequency of 400 kHz (or less).
Figure 1.
Logic diagram
V CC
SDA
M24xxx
SCL
WC
V SS
Table 1.
Signal names
Signal name
SDA
SCL
WC
V
CC
V
SS
Function
Serial data
Serial clock
Write control
Supply voltage
Ground
Direction
I/O
Input
Input
-
-
Figure 2.
8-pin package connections, top view
NC
NC
NC
V SS
1
2
3
4
8
7
6
5
V CC
WC
SCL
SDA
1.
NC: Not Connected
DS9194
-
Rev 10
page 2/40
M24C16-W M24C16-R M24C16-F
Signal description
2
2.1
Signal description
Serial clock (SCL)
The signal applied on the SCL input is used to strobe the data available on SDA(in) and to output the data on
SDA(out).
2.2
Serial data (SDA)
SDA is an input/output used to transfer data in or data out of the device. SDA(out) is an open drain output that
may be wire-OR'ed with other open drain or open collector signals on the bus. A pull-up resistor must be
connected from serial data (SDA) to V
CC
(Figure
11
indicates how to calculate the value of the pull-up resistor).
2.3
Write control (WC)
This input signal is useful for protecting the entire contents of the memory from inadvertent write operations. Write
operations are disabled to the entire memory array when write control (WC) is driven high. Write operations are
enabled when write control (WC) is either driven low or left floating.
When write control (WC) is driven high, device select and address bytes are acknowledged, Data bytes are not
acknowledged.
2.4
V
SS
(ground)
V
SS
is the reference for the V
CC
supply voltage.
2.5
2.5.1
Supply voltage (V
CC
)
Operating supply voltage (V
CC
)
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
voltage within the specified
[V
CC
(min), V
CC
(max)] range must be applied (see Operating conditions in
Section 8 DC and AC parameters).
In
order to secure a stable DC supply voltage, it is recommended to decouple the V
CC
line with a suitable capacitor
(usually of the order of 10 nF to 100 nF) close to the V
CC
/V
SS
package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction and, for a write
instruction, until the completion of the internal write cycle (t
W
).
2.5.2
Power-up conditions
The V
CC
voltage has to rise continuously from 0 V up to the minimum V
CC
operating voltage (see Operating
conditions in
Section 8 DC and AC parameters).
2.5.3
Device reset
In order to prevent inadvertent write operations during power-up, a power-on-reset (POR) circuit is included.
At power-up, the device does not respond to any instruction until V
CC
has reached the internal reset threshold
voltage. This threshold is lower than the minimum V
CC
operating voltage (see Operating conditions in
Section
8 DC and AC parameters).
When V
CC
passes over the POR threshold, the device is reset and enters the
Standby Power mode; however, the device must not be accessed until V
CC
reaches a valid and stable DC voltage
within the specified [V
CC
(min), V
CC
(max)] range (see Operating conditions in
Section 8 DC and AC parameters).
In a similar way, during power-down (continuous decrease in V
CC
), the device must not be accessed when V
CC
drops below V
CC
(min). When V
CC
drops below the threshold voltage, the device stops responding to any
instruction sent to it.
2.5.4
Power-down conditions
During power-down (continuous decrease in V
CC
), the device must be in the standby power mode (mode reached
after decoding a Stop condition, assuming that there is no internal write cycle in progress).
DS9194
-
Rev 10
page 4/40
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