EEWORLDEEWORLDEEWORLD

Part Number

Search

1N4006GP/72

Description
Rectifier Diode, 1 Element, 1A, 800V V(RRM), Silicon, DO-204AL, PLASTIC, DO-41, 2 PIN
CategoryDiscrete semiconductor    diode   
File Size330KB,4 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Download Datasheet Parametric View All

1N4006GP/72 Overview

Rectifier Diode, 1 Element, 1A, 800V V(RRM), Silicon, DO-204AL, PLASTIC, DO-41, 2 PIN

1N4006GP/72 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDO-41
package instructionPLASTIC, DO-41, 2 PIN
Contacts2
Reach Compliance Codeunknow
ECCN codeEAR99
Other featuresFREE WHEELING DIODE, LOW LEAKAGE CURRENT
Shell connectionISOLATED
ConfigurationSINGLE
Diode component materialsSILICON
Diode typeRECTIFIER DIODE
JEDEC-95 codeDO-204AL
JESD-30 codeO-PALF-W2
JESD-609 codee0
Number of components1
Number of terminals2
Maximum output current1 A
Package body materialPLASTIC/EPOXY
Package shapeROUND
Package formLONG FORM
Peak Reflow Temperature (Celsius)NOT SPECIFIED
Certification statusNot Qualified
Maximum repetitive peak reverse voltage800 V
Maximum reverse recovery time2 µs
surface mountNO
Terminal surfaceTIN LEAD
Terminal formWIRE
Terminal locationAXIAL
Maximum time at peak reflow temperatureNOT SPECIFIED
Base Number Matches1
1N4001GP thru 1N4007GP
Vishay General Semiconductor
Glass Passivated Junction Rectifier
Major Ratings and Characteristics
I
F(AV)
V
RRM
I
FSM
I
R
V
F
T
j
max.
1.0 A
50 V to 1000 V
30 A
5.0 µA
1.1 V
175 °C
®
ted*
aten
P
* Glass-plastic encapsulation
technique is covered by
Patent No. 3,996,602,
brazed-lead assembly
by Patent No. 3,930,306
DO-204AL (DO-41)
Features
• Superectifier structure for High Reliability
application
• Cavity-free glass-passivated junction
• Low forward voltage drop
• Low leakage current, typical I
R
less than 0.1 µA
• High forward surge capability
• Meets environmental standard MIL-S-19500
• Solder Dip 260 °C, 40 seconds
Mechanical Data
Case:
DO-204AL, molded epoxy over glass body
Epoxy meets UL-94V-0 Flammability rating
Terminals:
Matte tin plated leads, solderable per
J-STD-002B and JESD22-B102D
E3 suffix for commercial grade, HE3 suffix for high
reliability grade (AEC Q101 qualified)
Polarity:
Color band denotes cathode end
Typical Applications
For use in general purpose rectification of power sup-
plies, inverters, converters and freewheeling diodes
for both consumer and automotive applications
Maximum Ratings
(T
A
= 25 °C unless otherwise noted)
Parameter
Maximum repetitive peak
reverse voltage
* Maximum RMS voltage
* Maximum DC blocking
voltage
* Maximum average forward
rectified current 0.375"
(9.5 mm) lead length
at T
A
= 75 °C
* Peak forward surge current
8.3 ms single half sine-wave
superimposed on rated load
* Maximum full load reverse
current, full cycle average
0.375" (9.5 mm) lead length
T
A
= 75 °C
* Operating junction and
storage temperature range
Document Number 88504
14-Sep-05
Symbol
V
RRM
V
RMS
V
DC
I
F(AV)
1N4001GP 1N4002GP 1N4003GP 1N4004GP 1N4005GP 1N4006GP 1N4007GP Unit
50
35
50
100
70
100
200
140
200
400
280
400
1.0
600
420
600
800
560
800
1000
700
1000
V
V
V
A
I
FSM
30
A
I
R(AV)
30
µA
T
J
, T
STG
- 65 to + 175
°C
www.vishay.com
1
CATV Amplifier Design Based on DOCSIS 4.0 Products
DOCSIS 3.1 的出现让 CATV 提供商能够增加上下行容量。新一代 DOCSIS 4.0 产品目前正处于设计阶段。使用正确的 CATV 放大器可显著提高解决方案的效率。 To stay competitive in the evolving cable television (CATV) business, innovative technologies are needed to mee...
alan000345 RF/Wirelessly
Both DC and AC regulated output
DC can output a regulated voltage, but AC cannot output a regulated voltage. What is the reason? . ....
secondlife110 Analog electronics
Help: How to build a database
As the title says, I have a fully customized standard unit and I want to generate a .lib file. How can I do this? Can anyone tell me what tool to use? Thanks!...
porsche_ FPGA/CPLD
Setup and Hold Time
As shown in the figure, setup time and hold time are both for the clock edge. As shown in the figure, the clock edge has a rising process. What is the intersection point of the dotted line in the figu...
平漂流 FPGA/CPLD
I was worried for a long time after looking at the program, and it turns out that the IO port multiplexing function in ch579 does not need to be set.
For example, the serial port example is like this:there is no io multiplexing setting, and no need to set the io multiplexing register? 7.3.1 Multiplexing FunctionSome I/O pins have multiplexing funct...
shzps Domestic Chip Exchange
The difference between using stm32 JTAG and SWD
[i=s]This post was last edited by Sanya Northeastern on 2021-6-12 22:14[/i]The difference between using stm32 JTAG and SWDRegarding the difference between the use of JTAG and SWD, I think the followin...
三亚东北人 stm32/stm8

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 715  1616  1801  2875  399  15  33  37  58  9 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号