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IDT49FCT3805QG8

Description
Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20
Categorylogic    logic   
File Size63KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric View All

IDT49FCT3805QG8 Overview

Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20

IDT49FCT3805QG8 Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQSOP
package instructionSSOP, SSOP20,.25
Contacts20
Reach Compliance Codecompliant
ECCN codeEAR99
seriesFCT
Input adjustmentSCHMITT TRIGGER
JESD-30 codeR-PDSO-G20
JESD-609 codee3
length8.65 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
MaximumI(ol)0.024 A
Humidity sensitivity level1
Number of functions1
Number of inverted outputs
Number of terminals20
Actual output times10
Maximum operating temperature70 °C
Minimum operating temperature
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSSOP
Encapsulate equivalent codeSSOP20,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Prop。Delay @ Nom-Sup5.8 ns
propagation delay (tpd)5.8 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.5 ns
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formGULL WING
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9116 mm
Base Number Matches1
IDT49FCT805/A
FAST CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
FAST CMOS
BUFFER/CLOCK DRIVER
IDT49FCT805/A
FEATURES:
0.5 MICRON CMOS Technology
Guaranteed low skew < 700ps (max.)
Low duty cycle distortion < 1ns (max.)
Low CMOS power levels
TTL compatible inputs and outputs
Rail-to-rail output voltage swing
High drive: -24mA I
OH
, +64mA I
OL
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
Available in SSOP and SOIC packages
DESCRIPTION:
The 49FCT805 is a non-inverting buffer/clock driver built using ad-
vanced dual metal CMOS technology. Each bank consists of two banks of
drivers. Each bank drives five output buffers from a standard TTL
compatible input. These devices feature a “heart-beat” monitor for
diagnostics and PLL driving. The MON output is identical to all other outputs
and complies with the output specifications in this document.
The 49FCT805 offers low capacitance inputs and hysteresis. Rail-to-rail
output swing improves noise margin and allows easy interface with CMOS
inputs.
FUNCTIONAL BLOCK DIAGRAM
OE
A
IN
A
5
OA
1
-OA
5
IN
B
5
OB
1
-OB
5
OE
B
MON
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
1
c
2006
Integrated Device Technology, Inc.
MAY 2010
DSC-5836/5

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