K4S643233F-S(D)E/N/I/P
512K x 32Bit x 4 Banks SDRAM
FEATURES
•
•
•
•
3.0V & 3.3 power supply
.
LVCMOS compatible with multiplexed address.
Four banks operation.
MRS cycle with address key programs.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system
clock .
Burst read single-bit write operation.
DQM for masking.
Auto & self refresh.
64ms refresh period (4K cycle).
Extended temperature operation (-25°C to 85
°C).
Industrial temperature operation ( -40°C to 85°C).
90balls FBGA(-SXXX -Pb, -DXXX -Pb Free).
CMOS SDRAM
GENERAL DESCRIPTION
The K4S643233F is 67,108,864 bits synchronous high data rate
Dynamic RAM organized as 4 x 524,288 words by 32 bits, fabri-
cated with SAMSUNG′s high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock. I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst lengths and
programmable latencies allow the same device to be useful for a
variety of high bandwidth and high performance memory system
applications.
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•
•
•
•
•
•
ORDERING INFORMATION
Part No.
K4S643233F-SE/N/I/P75
K4S643233FSE/N/I/P1H
K4S643233F-SE/N/I/P1L
K4S643233F-DE/N/I/P75
K4S643233F-DE/N/I/P1H
K4S643233F-DE/N/I/P1L
Max Freq.
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=2)
105MHz(CL=3)
*1
133MHz(CL=3)
105MHz(CL=2)
105MHz(CL=2)
105MHz(CL=3)
*1
LVCMOS
90FBGA
Pb Free
Interface Package
90FBGA
Pb
FUNCTIONAL BLOCK DIAGRAM
-S(D)E/N ; Normal/Low Power, Temp : -25
°C
~ 85
°C.
-S(D)I/P ; Normal/Low Power, Temp : -40°C ~ 85
°C.
Note :
1. In case of 40MHz Frequency, CL1 can be supported.
I/O Control
LWE
Data Input Register
LDQM
Bank Select
512K x 32
512K x 32
512K x 32
512K x 32
Refresh Counter
Output Buffer
Row Decoder
Sense AMP
Row Buffer
DQi
Address Register
CLK
ADD
Column Decoder
Col. Buffer
LRAS
LCBR
Latency & Burst Length
LCKE
LRAS
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
CLK
CKE
CS
RAS
CAS
WE
DQM
*Samsung Electronics reserves the right to change products or specification without notice.
Rev. 1.5 Dec. 2002
K4S643233F-S(D)E/N/I/P
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on V
D D
supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
V
I N
, V
OUT
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
1
50
CMOS SDRAM
Unit
V
V
°C
W
mA
Notes
:
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= -25
°C
to 85
°C
for Extended, -40°C to 85°C for Industrial)
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Symbol
V
D D
V
DDQ
V
I H
V
IL
V
O H
V
OL
I
LI
Min
2.7
2.7
2.2
-0.3
2.4
-
-10
Typ
3.0
3.0
3.0
0
-
-
-
Max
3.6
3.6
V
DDQ
+0.3
0.5
-
0.4
10
Unit
V
V
V
V
V
V
uA
1
2
I
O H
= -2mA
I
OL
= 2mA
3
Note
Notes
:
1. V
IH
(max) = 5.3V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
CAPACITANCE
Clock
(V
DD
= 3.0V & 3.3, T
A
= 23
°C,
f = 1MHz, V
REF
=0.9V
±
50 mV)
Pin
Symbol
C
CLK
C
IN
C
ADD
C
OUT
Min
-
-
-
-
Max
4.0
4.0
4.0
6.0
Unit
pF
pF
pF
pF
Note
RAS, CAS, WE, CS, CKE, DQM
0
~ DQM
3
Address(A
0
~ A
10,
BA
0
~ BA
1
)
D Q
0
~ DQ
31
Rev. 1.5 Dec. 2002
K4S643233F-S(D)E/N/I/P
DC CHARACTERISTICS
CMOS SDRAM
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
= -25°C to 85
°C
for Extended, -40
°C
to 85°C for Industrial)
Parameter
Symbol
Test Condition
-75
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
I
CC1
Burst length = 1
t
RC
≥
t
R C
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
80
Version
-1H
75
-1L
75
mA
1
Unit
Note
I
CC2
P
0.5
0.5
11
I
CC2
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
C C 2
N
CKE
≥
V
IH
(min), CS
≥
V
I H
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
mA
Precharge Standby Current
in non power-down mode
I
CC2
NS
Active Standby Current
in power-down mode
I
CC3
P
mA
8
5
5
22
mA
I
CC3
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
C C 3
N
CKE
≥
V
IH
(min), CS
≥
V
I H
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA ,Page burst
t
RC
≥
t
RC
(min)
CKE
≤
0.2V
-S(D)E/I
-S(D)N/P
95
135
mA
Active Standby Current
in non power-down mode
(One Bank Active)
Operating Current
Refresh Current
Self Refresh Current
I
CC3
NS
I
CC4
I
CC5
I
CC6
22
75
120
2
0.4
75
120
mA
mA
mA
mA
1
2
3
4
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3. K4S643233F-S(D)E/I**
4. K4S643233F-S(D)N/P**
5. Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ).
Rev. 1.5 Dec. 2002
DSP and ARM Processors
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