5962-9951401QXA datasheet, PDF

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5962-9951401QXA: DescriptionConfiguration Memory, 1MX1, PDSO20, PLASTIC, SOIC-20; Categorystorage storage; File Size93KB，10 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/

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5962-9951401QXA Overview

Configuration Memory, 1MX1, PDSO20, PLASTIC, SOIC-20

5962-9951401QXA Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	SOIC
package instruction	SOP,
Contacts	20
Reach Compliance Code	compliant
ECCN code	EAR99
JESD-30 code	R-PDSO-G20
JESD-609 code	e0
length	12.8 mm
memory density	1048576 bit
Memory IC Type	CONFIGURATION MEMORY
memory width	1
Number of functions	1
Number of terminals	20
word count	1048576 words
character code	1000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	1MX1
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Filter level	MIL-PRF-38535 Class Q
Maximum seat height	2.65 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.5 mm
Base Number Matches	1

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QPRO Series Configuration

PROMs (XQ) including

Radiation-Hardened Series (XQR)

DS062 (v3.0) February 8, 2000

Preliminary Product Specification

Features

•

XQ1701L/XQR1701L

QML Certified

Configuration one-time programmable (OTP) read-only

memory designed to store configuration bitstreams of

Xilinx FPGA devices

Simple interface to the FPGA; requires only one user

I/O pin

Cascadable for storing longer or multiple bitstreams

Programmable reset polarity (active High or active

Low) for compatibility with different FPGA solutions

Supports XQ4000XL/Virtex fast configuration mode

(15.0 MHz)

Available in 44-pin ceramic LCC (M grade) package

Available in 20-pin SOIC package (XQ1701L only)

Programming support by leading programmer

manufacturers.

Design support using the Xilinx Alliance and

Foundation series software packages.

XQR1701L (only)

Fabricated on Epitaxial Silicon to improve latch

performance (parts are immune to Single Event

Latch-up)

Single Event Bit Upset immune

Total Dose tolerance in excess of 50K rads(Si)

All lots subjected to TID Lot Qualification in accordance

with method 1019 (dose rate ~9.0 rads(Si)/sec)

XQ1701L (only)

Also available under the following Standard Microcircuit

Drawing (SMD): 5962-9951401. For more information

contact hte Defense Supply Center Columbus (DSCC):

http://www.dscc.dla.mil/Programs/Smcr/

Description

The QPRO™ series XQ1701L are Xilinx 3.3V high-density

configuration PROMs. The XQR1701L are radiation hard-

ened. These devices are manufactured on Xilinx QML certi-

fied manufacturing lines utilizing epitaxial substrates and

TID lot qualification (per method 1019).

When the FPGA is in Master Serial mode, it generates a

configuration clock that drives the PROM. A short access

time after the rising clock edge, data appears on the PROM

DATA output pin that is connected to the FPGA D

pin. The

FPGA generates the appropriate number of clock pulses to

complete the configuration. Once configured, it disables the

PROM. When the FPGA is in Slave Serial mode, the PROM

and the FPGA must both be clocked by an incoming signal.

Figure 1

shows a simplied block diagram.

Multiple devices can be concatenated by using the CEO

output to drive the CE input of the following device. The

clock inputs and the DATA outputs of all PROMs in this

chain are interconnected. All devices are compatible and

can be cascaded with other members of the family.

For device programming, either the Xilinx Alliance or Foun-

dation series development system compiles the FPGA

design file into a standard Hex format, which is then trans-

ferred to most commercial PROM programmers.

•

arks, registered trademarks, patents, and disclaim are as listed at

http://www.xilinx.com/legal.htm.

ers

All other tradem

arks and registered tradem

arks are the property of their respective owners. All specifications are subject to change without notice.

DS062 (v3.0) February 8, 2000

Preliminary Product Specification

www.xilinx.com

1-800-255-7778

5962-9951401QXA Related Products

	5962-9951401QXA	5962-9951401QXX	5962-9951401QXB	5962-9951401QYB
Description	Configuration Memory, 1MX1, PDSO20, PLASTIC, SOIC-20	Configuration Memory	Configuration Memory, 1MX1, PDSO20, PLASTIC, SOIC-20	Configuration Memory, 1MX1, Serial, CMOS, CQCC44, CERAMIC, LCC-44
package instruction	SOP,	,	SOP,	QCCJ,
Reach Compliance Code	compliant	unknown	compliant	compliant
Memory IC Type	CONFIGURATION MEMORY	CONFIGURATION MEMORY	CONFIGURATION MEMORY	CONFIGURATION MEMORY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Is it Rohs certified?	incompatible	-	incompatible	incompatible
Parts packaging code	SOIC	-	SOIC	LCC
Contacts	20	-	20	44
ECCN code	EAR99	-	3A001.A.2.C	EAR99
JESD-30 code	R-PDSO-G20	-	R-PDSO-G20	S-GQCC-J44
JESD-609 code	e0	-	e0	e0
length	12.8 mm	-	12.8 mm	16.51 mm
memory density	1048576 bit	-	1048576 bit	1048576 bit
memory width	1	-	1	1
Number of functions	1	-	1	1
Number of terminals	20	-	20	44
word count	1048576 words	-	1048576 words	1048576 words
character code	1000000	-	1000000	1000000
Operating mode	SYNCHRONOUS	-	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	125 °C	-	125 °C	125 °C
Minimum operating temperature	-55 °C	-	-55 °C	-55 °C
organize	1MX1	-	1MX1	1MX1
Package body material	PLASTIC/EPOXY	-	PLASTIC/EPOXY	CERAMIC, GLASS-SEALED
encapsulated code	SOP	-	SOP	QCCJ
Package shape	RECTANGULAR	-	RECTANGULAR	SQUARE
Package form	SMALL OUTLINE	-	SMALL OUTLINE	CHIP CARRIER
Filter level	MIL-PRF-38535 Class Q	-	MIL-PRF-38535 Class Q	MIL-PRF-38535 Class Q
Maximum seat height	2.65 mm	-	2.65 mm	4.826 mm
Maximum supply voltage (Vsup)	3.6 V	-	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	-	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	-	3.3 V	3.3 V
surface mount	YES	-	YES	YES
Temperature level	MILITARY	-	MILITARY	MILITARY
Terminal surface	TIN LEAD	-	TIN LEAD	TIN LEAD
Terminal form	GULL WING	-	GULL WING	J BEND
Terminal pitch	1.27 mm	-	1.27 mm	1.27 mm
Terminal location	DUAL	-	DUAL	QUAD
width	7.5 mm	-	7.5 mm	16.51 mm
Base Number Matches	1	1	-	1

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