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IDT74FCT162543TEG

Description
Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56
Categorylogic    logic   
File Size132KB,7 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
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IDT74FCT162543TEG Overview

Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56

IDT74FCT162543TEG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeDFP
package instructionDFP,
Contacts56
Reach Compliance Codecompliant
Other featuresINDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
seriesFCT
JESD-30 codeR-GDFP-F56
JESD-609 codee3
length18.415 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeREGISTERED BUS TRANSCEIVER
Number of digits8
Number of functions2
Number of ports2
Number of terminals56
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE WITH SERIES RESISTOR
Output polarityTRUE
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)12.5 ns
Certification statusNot Qualified
Maximum seat height2.143 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formFLAT
Terminal pitch0.635 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width9.652 mm
Base Number Matches1
IDT54/74FCT162543T/AT/CT/ET
FAST CMOS 16-BIT LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS
16-BIT LATCHED
TRANSCEIVER
FEATURES:
0.5 MICRON CMOS Technology
High-speed, low-power CMOS replacement for ABT functions
Typical t
SK
(o) (Output Skew) < 250ps
Low input and output leakage
≤1µ
A (max.)
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP
and 25 mil pitch CERPACK packages
Extended commercial range of -40°C to +85°C
V
CC
= 5V ±10%
Balanced Output Drivers:
±24mA (commercial)
±16mA (military)
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at V
CC
= 5V, T
A
=
25°C
IDT54/74FCT162543T/AT/CT/ET
DESCRIPTION:
The FCT162543T/AT/CT/ET 16-bit latched transceivers are built
using advanced dual metal CMOS technology. These high-speed, low-
power devices are organized as two independent 8-bit D-type latched
transceivers with separate input and output control to permit independent
control of data flow in either direction. For example, the A-to-B Enable
(xCEAB) must be low in order to enter data from the A port or to output data
from the B port. xLEAB controls the latch function. When xLEAB is low, the
latches are transparent. A subsequent low-to-high transition of xLEAB
signal puts the A latches in the storage mode. xOEAB performs output
enable function on the B port. Data flow from the B port to the A port is similar
but requires using xCEBA, xLEBA, and xOEBA inputs. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT162543T/AT/CT/ET have balanced output drive with current
limiting resistors. This offers low ground bounce, minimal undershoot, and
controlled output fall times–reducing the need for external series terminat-
ing resistors. The FCT162543T/AT/CT/ET are plug-in replacements for
the FCT16543T/AT/CT/ET and 54/74ABT16543 for on-board bus inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
1
OEBA
1
CEBA
56
2
OEBA
2
CEBA
29
31
54
1
LEBA
1
OEAB
1
CEAB
1
LEAB
55
1
2
LEBA
2
OEAB
2
CEAB
2
LEAB
30
28
3
2
26
27
C
1
A
1
5
C
2
A
1
15
52
D
C
D
1
B
1
D
C
D
42
2
B
1
TO SEVEN OTH ER CHANN ELS
TO SEVEN OTH ER CHANN ELS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
AUGUST 1999
DSC-5445/-

IDT74FCT162543TEG Related Products

IDT74FCT162543TEG IDT74FCT162543ATEG IDT74FCT162543CTEG IDT74FCT162543ETEG
Description Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56 Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56 Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56 Registered Bus Transceiver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, CDFP56, 0.635 MM PITCH, CERPACK-56
Is it lead-free? Lead free Lead free Lead free Lead free
Is it Rohs certified? conform to conform to conform to conform to
Parts packaging code DFP DFP DFP DFP
package instruction DFP, DFP, DFP, DFP,
Contacts 56 56 56 56
Reach Compliance Code compliant compliant compliant compliant
Other features INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
series FCT FCT FCT FCT
JESD-30 code R-GDFP-F56 R-GDFP-F56 R-GDFP-F56 R-GDFP-F56
JESD-609 code e3 e3 e3 e3
length 18.415 mm 18.415 mm 18.415 mm 18.415 mm
Load capacitance (CL) 50 pF 50 pF 50 pF 50 pF
Logic integrated circuit type REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of digits 8 8 8 8
Number of functions 2 2 2 2
Number of ports 2 2 2 2
Number of terminals 56 56 56 56
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR 3-STATE WITH SERIES RESISTOR
Output polarity TRUE TRUE TRUE TRUE
Package body material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
encapsulated code DFP DFP DFP DFP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK FLATPACK FLATPACK FLATPACK
Peak Reflow Temperature (Celsius) 260 260 260 260
propagation delay (tpd) 12.5 ns 8 ns 5.6 ns 3.7 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.143 mm 2.143 mm 2.143 mm 2.143 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn) Matte Tin (Sn)
Terminal form FLAT FLAT FLAT FLAT
Terminal pitch 0.635 mm 0.635 mm 0.635 mm 0.635 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30
width 9.652 mm 9.652 mm 9.652 mm 9.652 mm
Maker IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology)
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