BU-61590D5-110S datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> BU-61590D5-110S

BU-61590D5-110S: DescriptionMil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CQIP78, 2.100 X 1.800 INCH, 0.210 INCH HEIGHT, DIP-78; CategoryThe embedded processor and controller Microcontrollers and processors; File Size79KB，8 Pages; ManufacturerData Device Corporation

Download Datasheet Parametric View All

BU-61590D5-110S Overview

Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CQIP78, 2.100 X 1.800 INCH, 0.210 INCH HEIGHT, DIP-78

BU-61590D5-110S Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Data Device Corporation
Parts packaging code	QIP
package instruction	2.100 X 1.800 INCH, 0.210 INCH HEIGHT, DIP-78
Contacts	78
Reach Compliance Code	compliant
Address bus width	16
boundary scan	NO
maximum clock frequency	16 MHz
letter of agreement	MIL-STD-1553A; MIL-STD-1553B
Data encoding/decoding methods	BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.125 MBps
External data bus width	16
JESD-30 code	R-CQIP-P78
JESD-609 code	e0
low power mode	NO
Number of serial I/Os	2
Number of terminals	78
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Filter level	MIL-PRF-38534
Maximum seat height	5.334 mm
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	TIN LEAD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	41.91 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553
Base Number Matches	1

Preview

Download Datasheet

View All

BU-61590

MIL-STD-1553A/B AND McAIR BC/RT/MT,

ADVANCED COMMUNICATION ENGINE (ACE)

FEATURES

•

Fully Integrated Terminal

DESCRIPTION

DDC's

BU-61590

BC/RT/MT

Universal Advanced Communication

Engine (ACE) terminal comprises a

complete integrated interface between

a host processor and a MIL-STD-

1553, STANAG 3838, or McAir bus.

The BU-61590 integrates a dual uni-

versal McAir transceiver, protocol,

memory management and processor

interface logic, and 4K words of inter-

nal buffered RAM in either a 78-pin

DIP or flat pack package.

This dual universal transceiver provides

a sinusoidal waveform for full compli-

ance with 1553A, 1553B, and McAir

A3818, A5232, and A5690 standards.

To minimize board space and "glue"

logic, the Universal ACE terminals

provide the ultimate flexibility in inter-

facing to a host processor and inter-

nal/external RAM.

The BU-61590 provides complete

multiprotocol support of MIL-STD-

1553A, 1553B Notice 2, McAir A3818,

A5232,

and

A5690,

General

Dynamics

16PP303,

Grumman

SPG151A, and STANAG 3838 (includ-

ing EFAbus). The advanced functional

architecture of the ACE terminals pro-

vides software compatibility to DDC's

previous AIM series hybrids. In addi-

tion, the ACE Terminals incorporate a

multiplicity of architectural enhance-

ments allowing flexible operation while

off-loading the host processor, ensur-

ing data consistency, and supporting

bulk data transfers.

The BU-61590 may be operated at

either 12 or 16 MHz. Options allow for

a hardwired or programmable RT

address.

The BU-61590 operates over the full

military temperature range of -55 to

+125°C. Available screened to MIL-

PRF-38534, the terminals are ideal

for demanding military and industrial

processor-to-1553 applications.

•

Dual Universal Transceiver

Satisfies McAir and 1553A/B

•

Multiprotocol Supports:

MIL-STD-1553A and B Notice 2

McAir A3818, A5232, & A5690

General Dynamics 16PP303

(F16) Grumman SPG151A

•

4K x 16 Internal RAM

•

Flexible Processor/Memory

Interface

•

Automatic BC Retries

•

Programmable BC Gap Times

•

BC Frame Auto-Repeat

•

Flexible RT Data Buffering

•

Programmable Illegalization

•

Selective Message Monitor

•

Simultaneous RT/Monitor Mode

TX/RX_A

4K X 16

SHARED

RAM

TRANSCEIVER

DATA

BUFFERS

PROCESSOR

DATA BUS

CH. A

TX/RX_A

DATA BUS

DUAL

ENCODER/DECODER,

MULTIPROTOCOL

AND

MEMORY

MANAGEMENT

D15-D0

TX/RX_B

ADDRESS BUS

ADDRESS

BUFFERS

A15-A0

PROCESSOR

ADDRESS BUS

CH. B

TRANSCEIVER

TX/RX_B

PROCESSOR

AND

MEMORY

INTERFACE

LOGIC

TRANSPARENT/BUFFERED, STRBD, SELECT,

RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,

MSB/LSB/DTGRT, INT_ACK

IOEN, MEMENA-OUT, READYD

ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,

8/16-BIT/DTREQ, POLARITY_SEL/DTACK

INT

PROCESSOR

AND

MEMORY

CONTROL

INTERRUPT

REQUEST

RT ADDRESS

RTAD4-RTAD0, RTADP

INCMD

MISCELLANEOUS

CLK_IN, TAG_CLK, BC/MT_ENA, TX_INH_A, TX_INH_B,

MSTCLR, SSFLAG/EXT_TRG, ILLEGAL, RT_AD_LAT

BU-61590 BLOCK DIAGRAM

1994, 1999 Data Device Corporation

Recommended Resources

BKSF-□2 series control cabinet electrical diagram

One of the single-phase motor energy consumption braking circuits

Schematic diagram of using TL431 as voltage regulator

Low brightness measurement circuit

Fully integrated 16-channel remote control system

Fast grating circuit

Comments on Infineon's "Introduction to EtherCAT and Industrial Isolation Products": Common challenges in industrial automation systems, such as the need for industrial-grade components that guarantee long-term availability, have a significant impact on which solutions are best suited...; soso Power technology

Xilinx 10.1 layout and routing prompts fatal error: ISE10.1 was used to synthesize the project, place and route it, and Virtex4: xc4vsx55-10ff1148 was used. DCM was used in the project, and the differential input DCM synthesis passed normally. Translat...; eeleader FPGA/CPLD

【Smart Network Desk Lamp】7. Get real-time weather information and analyze it: # Past sharing [【2022 Digi-Key Innovation Design Competition】Latest unboxing post](https://bbs.eeworld.com.cn/thread-1212955-1-1.html "【2022 Digi-Key Innovation Design Competition】Latest unboxing post...; hehung DigiKey Technology Zone

A problem encountered by the LM3S8962 evaluation board: I recently studied the LM3S8962 evaluation board and found that the driver library provided by TI did not mention the problem of displaying Chinese characters on the OLED screen. Please help me solve ...; eeleader Microcontroller MCU

Circuit Design of Filters and Attenuators: A filter is a typical frequency-selective circuit. In theory, within a given frequency band, it allows signals to pass through the circuit without attenuation. This section is called the passband. Oth...; fighting Analog electronics

[RISC-V MCU CH32V103 Review] +01 Try the use of GPIO to light up the first LED: [i=s]This post was last edited by xiaotian501 on 2021-1-26 22:37[/i]Preface As of January 26, 2021, Hebei is currently the hardest hit area of the epidemic, so I haven't received the development board...; 小天501 Domestic Chip Exchange

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components