Flash PLD, 20ns, 128-Cell, CMOS, PQCC84, PLASTIC, LCC-84
| Parameter Name | Attribute value |
| Is it Rohs certified? | incompatible |
| Maker | Cypress Semiconductor |
| Parts packaging code | LCC |
| package instruction | PLASTIC, LCC-84 |
| Contacts | 84 |
| Reach Compliance Code | not_compliant |
| Other features | LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 4 EXTERNAL CLOCKS; SHARED INPUT/CLOCK |
| maximum clock frequency | 50 MHz |
| In-system programmable | NO |
| JESD-30 code | S-PQCC-J84 |
| JESD-609 code | e0 |
| JTAG BST | NO |
| length | 29.3116 mm |
| Dedicated input times | 2 |
| Number of I/O lines | 64 |
| Number of macro cells | 128 |
| Number of terminals | 84 |
| Maximum operating temperature | 70 °C |
| Minimum operating temperature | |
| organize | 2 DEDICATED INPUTS, 64 I/O |
| Output function | MACROCELL |
| Package body material | PLASTIC/EPOXY |
| encapsulated code | QCCJ |
| Encapsulate equivalent code | LDCC84,1.2SQ |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Peak Reflow Temperature (Celsius) | NOT SPECIFIED |
| power supply | 5 V |
| Programmable logic type | FLASH PLD |
| propagation delay | 20 ns |
| Certification status | Not Qualified |
| Maximum seat height | 5.08 mm |
| Maximum supply voltage | 5.25 V |
| Minimum supply voltage | 4.75 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | CMOS |
| Temperature level | COMMERCIAL |
| Terminal surface | Tin/Lead (Sn/Pb) |
| Terminal form | J BEND |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| Maximum time at peak reflow temperature | NOT SPECIFIED |
| width | 29.3116 mm |
| Base Number Matches | 1 |
