LTC3548
Dual Synchronous,
400mA/800mA, 2.25MHz
Step-Down DC/DC Regulator
FEATURES
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DESCRIPTIO
High Efficiency: Up to 95%
Very Low Quiescent Current: Only 40µA
2.25MHz Constant Frequency Operation
High Switch Current: 0.7A and 1.2A
No Schottky Diodes Required
Low R
DS(ON)
Internal Switches: 0.35Ω
Current Mode Operation for Excellent Line
and Load Transient Response
Short-Circuit Protected
Low Dropout Operation: 100% Duty Cycle
Ultralow Shutdown Current: I
Q
< 1µA
Output Voltages from 5V down to 0.6V
Power-On Reset Output
Externally Synchronizable Oscillator
Small Thermally Enhanced MSOP and 3mm
×
3mm
DFN Packages
The LTC
®
3548 is a dual, constant frequency, synchronous
step down DC/DC converter. Intended for low power
applications, it operates from 2.5V to 5.5V input voltage
range and has a constant 2.25MHz switching frequency,
allowing the use of tiny, low cost capacitors and inductors
with a profile
≤1.2mm.
Each output voltage is adjustable
from 0.6V to 5V. Internal synchronous 0.35Ω, 0.7A/1.2A
power switches provide high efficiency without the need
for external Schottky diodes.
A user selectable mode input is provided to allow the user
to trade-off noise ripple for low power efficiency. Burst
Mode
®
operation provides high efficiency at light loads,
while Pulse Skip Mode provides low noise ripple at light
loads.
To further maximize battery runtime, the P-channel
MOSFETs are turned on continuously in dropout (100%
duty cycle), and both channels draw a total quiescent
current of only 40µA. In shutdown, the device draws <1µA.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Burst Mode is a registered
trademark of Linear Technology Corporation. Protected by U.S. Patents including 5481178,
6580258, 6304066, 6127815, 6498466, 6611131.
APPLICATIO S
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PDAs/Palmtop PCs
Digital Cameras
Cellular Phones
Portable Media Players
PC Cards
Wireless and DSL Modems
TYPICAL APPLICATIO
V
IN
= 2.8V
TO 5.5V
10µF
RUN2
V
IN
RUN1
POR
100k
RESET
MODE/SYNC
LTC3548
V
OUT2
= 2.5V
AT 400mA
4.7µH
SW2
68pF
EFFICIENCY (%)
2.2µH
SW1
33pF
V
OUT1
= 1.8V
AT 800mA
887k
4.7µF
280k
V
FB2
GND
V
FB1
604k
301k
10µF
3548 TA01
Figure 1. 2.5V/1.8V at 400mA/800mA Step-Down Regulators
U
LTC3548 Efficiency Curve
100
95
90
85
80
POWER LOSS
75
70
65
60
1
V
IN
= 3.3V, V
OUT
= 1.8V
Burst Mode OPERATION
CHANNEL 1, NO LOAD ON CHANNEL 2
10
100
LOAD CURRENT (mA)
1
10
EFFICIENCY
100
POWER LOSS (mW)
1000
0.1
1000
3548 TA02
U
U
3548f
1
LTC3548
ABSOLUTE
(Note 1)
AXI U RATI GS
Ambient Operating Temperature
Range (Note 2) ................................... – 40°C to 85°C
Junction Temperature (Note 5) ............................. 125°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
LTC3548EMSE only .......................................... 300°C
V
IN
Voltages.................................................– 0.3V to 6V
V
FB1
, V
FB2
, RUN1, RUN2
Voltages ..................................... – 0.3V to V
IN
+ 0.3V
MODE/SYNC Voltage ...................... – 0.3V to V
IN
+ 0.3V
SW1, SW2 Voltage ......................... – 0.3V to V
IN
+ 0.3V
POR Voltage ................................................– 0.3V to 6V
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
FB1
RUN1
V
IN
SW1
GND
1
2
3
4
5
11
10
V
FB2
9
RUN2
8
POR
7
SW2
6
MODE/
SYNC
ORDER PART
NUMBER
LTC3548EDD
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
DD PIN 11, EXPOSED PAD: PGND
MUST BE CONNECTED TO GND
T
JMAX
= 125°C,
θ
JA
= 45°C/W,
θ
JC
= 3°C/W
(Soldered to a 4-layer board)
DD PART MARKING
LBNJ
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V, unless otherwise specified. (Note 2)
SYMBOL
V
IN
I
FB
V
FB
∆V
LINE REG
∆V
LOAD REG
I
S
PARAMETER
Operating Voltage Range
Feedback Pin Input Current
Feedback Voltage (Note 3)
Reference Voltage Line Regulation
Output Voltage Load Regulation
Input DC Supply Current
Active Mode
Sleep Mode
Shutdown
Oscillator Frequency
Synchronization Frequency
Peak Switch Current Limit Channel 1
Peak Switch Current Limit Channel 2
Top Switch On-Resistance
Bottom Switch On-Resistance
Switch Leakage Current
V
IN
= 3V, V
FB
= 0.5V, Duty Cycle <35%
V
IN
= 3V, V
FB
= 0.5V, Duty Cycle <35%
(Note 6)
(Note 6)
V
IN
= 5V, V
RUN
= 0V, V
FB
= 0V
0.95
0.6
0°C
≤
T
A
≤
85°C
–40°C
≤
T
A
≤
85°C
V
IN
= 2.5V to 5.5V (Note 3)
(Note 3)
V
FB1
= V
FB2
= 0.5V
V
FB1
= V
FB2
= 0.63V, MODE/SYNC = 3.6V
RUN = 0V, V
IN
= 5.5V, MODE/SYNC = 0V
V
FB
= 0.6V
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
●
●
●
f
OSC
f
SYNC
I
LIM
R
DS(ON)
I
SW(LKG)
2
U
U
W
W W
U
W
TOP VIEW
V
FB1
RUN1
V
IN
SW1
GND
1
2
3
4
5
10
9
8
7
6
V
FB2
RUN2
POR
SW2
MODE/
SYNC
ORDER PART
NUMBER
LTC3548EMSE
11
MSE PACKAGE
10-LEAD PLASTIC MSOP
MSE PIN 11, EXPOSED PAD: PGND
MUST BE CONNECTED TO GND
T
JMAX
= 125°C,
θ
JA
= 45°C/W,
θ
JC
= 10°C/W
(Soldered to a 4-layer board)
MSE PART MARKING
LTBNH
MIN
2.5
0.588
0.585
TYP
MAX
5.5
30
UNITS
V
nA
V
V
%/V
%
0.6
0.6
0.3
0.5
700
40
0.1
0.612
0.612
0.5
950
60
1
2.7
1.6
0.9
0.45
0.45
1
µA
µA
µA
MHz
MHz
A
A
Ω
Ω
µA
3548f
1.8
2.25
2.25
1.2
0.7
0.35
0.30
0.01
LTC3548
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V, unless otherwise specified. (Note 2)
SYMBOL
POR
PARAMETER
Power-On Reset Threshold
Power-On Reset On-Resistance
Power-On Reset Delay
V
RUN
I
RUN
RUN Threshold
RUN Leakage Current
●
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
V
FB
Ramping Down, MODE/SYNC = 0V
MIN
TYP
–8.5
100
262,144
MAX
200
1.5
1
UNITS
%
Ω
Cycles
V
µA
0.3
1
0.01
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired. No pin shall exceed 6V.
Note 2:
The LTC3548 is guaranteed to meet specified performance from
0°C to 70°C. Specifications over the – 40°C and 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
The LTC3548 is tested in a proprietary test mode that connects
V
FB
to the output of the error amplifier.
Note 4:
Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5:
T
J
is calculated from the ambient T
A
and power dissipation P
D
according to the following formula: T
J
= T
A
+ (P
D
•
θ
JA
).
Note 6:
The DFN switch on-resistance is guaranteed by correlation to
wafer level measurements.
TYPICAL PERFOR A CE CHARACTERISTICS
Burst Mode Operation
SW
5V/DIV
V
OUT
20mV/DIV
SW
5V/DIV
V
OUT
10mV/DIV
I
L
200mA/DIV
V
IN
= 3.6V
2µs/DIV
V
OUT
= 1.8V
I
LOAD
= 180mA
CHANNEL 1; CIRCUIT OF FIGURE 3
Efficiency vs Input Voltage
100
95
90
EFFICIENCY (%)
FREQUENCY DEVIATION (%)
100mA
10mA
85
80
75
70
65
60
2
V
OUT
= 1.8V, CHANNEL 1
Burst Mode OPERATION
CIRCUIT OF FIGURE 3
3
4
INPUT VOLTAGE (V)
3548 G04
FREQUENCY (MHz)
1mA
800mA
5
U W
6
T
A
= 25°C unless otherwise specified.
Load Step
V
OUT
200mV/DIV
I
L
500mA/DIV
I
LOAD
500mA/DIV
Pulse Skipping Mode
I
L
200mA/DIV
3548 G01
V
IN
= 3.6V
1µs/DIV
V
OUT
= 1.8V
I
LOAD
= 30mA
CHANNEL 1; CIRCUIT OF FIGURE 3
3548 G02
V
IN
= 3.6V
20µs/DIV
V
OUT
= 1.8V
I
LOAD
= 80mA TO 800mA
CHANNEL 1; CIRCUIT OF FIGURE 3
3548 G03
Oscillator Frequency vs
Temperature
2.5
V
IN
= 3.6V
10
8
6
4
2
0
–2
–4
–6
–8
2.0
–50 –25
–10
50
25
75
0
TEMPERATURE (°C)
100
125
Oscillator Frequency vs Supply
Voltage
2.4
2.3
2.2
2.1
2
3
4
SUPPLY VOLTAGE (V)
5
6
3548 G06
3548 G05
3548f
3
LTC3548
TYPICAL PERFOR A CE CHARACTERISTICS
Reference Voltage vs
Temperature
0.615
V
IN
= 3.6V
0.610
REFERENCE VOLTAGE (V)
R
DS(ON)
(mΩ)
R
DS(ON)
(mΩ)
0.605
0.600
0.595
0.590
0.585
–50 –25
50
25
75
0
TEMPERATURE (°C)
Efficiency vs Load Current
100
95
90
EFFICIENCY (%)
Burst Mode OPERATION
V
OUT
ERROR (%)
85
80
PULSE SKIP MODE
75
70
65
60
1
V
IN
= 3.6V, V
OUT
= 1.8V
NO LOAD ON OTHER CHANNEL
CHANNEL 1; CIRCUIT OF FIGURE 3
10
100
LOAD CURRENT (mA)
1000
3548 G11
0.5
0
PULSE SKIP MODE
–0.5
–1.0
–1.5
–2.0
1
V
IN
= 3.6V, V
OUT
= 1.8V
NO LOAD ON OTHER CHANNEL
CHANNEL 1; CIRCUIT OF FIGURE 3
10
100
LOAD CURRENT (mA)
1000
3548 G12
V
OUT
ERROR (%)
Efficiency vs Load Current
100
2.7V
90
4.2V
EFFICIENCY (%)
EFFICIENCY (%)
3.6V
EFFICIENCY (%)
80
70
60
V
OUT
= 2.5V, CHANNEL 1
50 Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
CIRCUIT OF FIGURE 3
40
1
10
100
LOAD CURRENT (mA)
4
U W
100
3548 G07
3548 G10
R
DS(ON)
vs Input Voltage
500
T
A
= 25°C
450
450
400
350
300
250
200
125
1
2
SYNCHRONOUS
SWITCH
MAIN
SWITCH
400
350
300
250
200
150
3
4
V
IN
(V)
5
6
7
3548 G08
R
DS(ON)
vs Junction Temperature
550
500
V
IN
= 4.2V
V
IN
= 2.7V
V
IN
= 3.6V
100
–50 –25
MAIN SWITCH
SYNCHRONOUS SWITCH
25 50 75 100 125 150
0
JUNCTION TEMPERATURE (°C)
3548 G09
Load Regulation
2.0
1.5
1.0
Burst Mode OPERATION
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
Line Regulation
V
OUT
= 1.8V
I
OUT
= 200mA
T
A
= 25°C
2
3
4
V
IN
(V)
5
6
3548 G15
Efficiency vs Load Current
100
95
90
85
4.2V
80
75
70
V
OUT
= 1.5V, CHANNEL 1
Burst Mode OPERATION
65
NO LOAD ON OTHER CHANNEL
CIRCUIT OF FIGURE 3
60
1
10
100
LOAD CURRENT (mA)
3.6V
2.7V
100
95
90
85
80
75
70
Efficiency vs Load Current
3.6V
2.7V
4.2V
1000
1000
3548 G14
V
OUT
= 1.2V, CHANNEL 1
Burst Mode OPERATION
65
NO LOAD ON OTHER CHANNEL
CIRCUIT OF FIGURE 3
60
1
10
100
LOAD CURRENT (mA)
1000
3548 G13
3548f
LTC3548
PI FU CTIO S
V
FB1
(Pin 1):
Output Feedback. Receives the feedback
voltage from the external resistive divider across the
output. Nominal voltage for this pin is 0.6V.
RUN1 (Pin 2):
Regulator 1 Enable. Forcing this pin to V
IN
enables regulator 1, while forcing it to GND causes regu-
lator 1 to shut down. This pin must be driven; do not float.
V
IN
(Pin 3):
Main Power Supply. Must be closely decoupled
to GND.
SW1 (Pin 4):
Regulator 1 Switch Node Connection to the
Inductor. This pin swings from V
IN
to GND.
GND (Pin 5):
Main Ground. Connect to the (–) terminal of
C
OUT
, and (–) terminal of C
IN
.
MODE/SYNC (Pin 6):
Combination Mode Selection and
Oscillator Synchronization. This pin controls the operation
of the device. When tied to V
IN
or GND, Burst Mode
operation or pulse skipping mode is selected, respec-
tively. Do not float this pin. The oscillation frequency can
be synchronized to an external oscillator applied to this pin
and pulse skipping mode is automatically selected.
SW2 (Pin 7):
Regulator 2 Switch Node Connection to the
Inductor. This pin swings from V
IN
to GND.
POR (Pin 8):
Power-On Reset . This common-drain logic
output is pulled to GND when the output voltage falls
below –8.5% of regulation and goes high after 117ms
when both channels are within regulation.
RUN2 (Pin 9):
Regulator 2 Enable. Forcing this pin to V
IN
enables regulator 2, while forcing it to GND causes regu-
lator 2 to shut down. This pin must be driven; do not float.
V
FB2
(Pin 10):
Output Feedback. Receives the feedback
voltage from the external resistive divider across the
output. Nominal voltage for this pin is 0.6V.
Exposed Pad (GND) (Pin 11):
Power Ground. Connect to
the (–) terminal of C
OUT
, and (–) terminal of C
IN
. Must be
connected to electrical ground on PCB.
U
U
U
3548f
5
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