5962-8984112LA datasheet, PDF - EEWORLD Datasheet

5962-8984112LA: DescriptionFlash PLD, 10ns, PAL-Type, CMOS, CDIP24, CERAMIC, DIP-24; CategoryProgrammable logic devices Programmable logic; File Size302KB，9 Pages; ManufacturerCypress Semiconductor

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5962-8984112LA Overview

Flash PLD, 10ns, PAL-Type, CMOS, CDIP24, CERAMIC, DIP-24

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Cypress Semiconductor
Parts packaging code	DIP
package instruction	CERAMIC, DIP-24
Contacts	24
Reach Compliance Code	not_compliant
ECCN code	3A001.A.2.C
Architecture	PAL-TYPE
maximum clock frequency	76.9 MHz
JESD-30 code	R-GDIP-T24
JESD-609 code	e0
Dedicated input times	11
Number of I/O lines	10
Number of entries	22
Output times	10
Number of product terms	132
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	11 DEDICATED INPUTS, 10 I/O
Output function	MACROCELL
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP24,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Programmable logic type	FLASH PLD
propagation delay	10 ns
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum supply voltage	5.5 V
Minimum supply voltage	4.5 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb) - hot dipped
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

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