54ACTQ544SDMQB/NOPB datasheet, PDF

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54ACTQ544SDMQB/NOPB: DescriptionACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24; Categorylogic logic; File Size26KB，9 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/; Environmental Compliance

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54ACTQ544SDMQB/NOPB Overview

ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24

54ACTQ544SDMQB/NOPB Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Texas Instruments
package instruction	DIP,
Reach Compliance Code	compliant
Other features	INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
series	ACT
JESD-30 code	R-GDIP-T24
Load capacitance (CL)	50 pF
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER
Humidity sensitivity level	1
Number of digits	8
Number of functions	1
Number of ports	2
Number of terminals	24
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Output characteristics	3-STATE
Output polarity	INVERTED
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	11 ns
Certification status	Not Qualified
Filter level	MIL-STD-883 Class B
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal form	THROUGH-HOLE
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Base Number Matches	1

54ACTQ544SDMQB/NOPB Related Products

	54ACTQ544SDMQB/NOPB	54ACTQ544FMQB/NOPB	54ACTQ544SDMQB
Description	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP24, CERAMIC, FP-24	ACT SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24
Is it Rohs certified?	conform to	conform to	incompatible
package instruction	DIP,	DFP,	DIP, DIP24,.3
Reach Compliance Code	compliant	compliant	compliant
Other features	INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
series	ACT	ACT	ACT
JESD-30 code	R-GDIP-T24	R-GDFP-F24	R-GDIP-T24
Load capacitance (CL)	50 pF	50 pF	50 pF
Logic integrated circuit type	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER	REGISTERED BUS TRANSCEIVER
Humidity sensitivity level	1	1	1
Number of digits	8	8	8
Number of functions	1	1	1
Number of ports	2	2	2
Number of terminals	24	24	24
Maximum operating temperature	125 °C	125 °C	125 °C
Minimum operating temperature	-55 °C	-55 °C	-55 °C
Output characteristics	3-STATE	3-STATE	3-STATE
Output polarity	INVERTED	INVERTED	INVERTED
Package body material	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED	CERAMIC, GLASS-SEALED
encapsulated code	DIP	DFP	DIP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	FLATPACK	IN-LINE
Peak Reflow Temperature (Celsius)	260	260	260
propagation delay (tpd)	11 ns	11 ns	11 ns
Certification status	Not Qualified	Not Qualified	Not Qualified
Filter level	MIL-STD-883 Class B	MIL-STD-883 Class B	MIL-STD-883 Class B
Maximum supply voltage (Vsup)	5.5 V	5.5 V	5.5 V
Minimum supply voltage (Vsup)	4.5 V	4.5 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V	5 V
surface mount	NO	YES	NO
technology	CMOS	CMOS	CMOS
Temperature level	MILITARY	MILITARY	MILITARY
Terminal form	THROUGH-HOLE	FLAT	THROUGH-HOLE
Terminal location	DUAL	DUAL	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
Base Number Matches	1	1	1
Maker	Texas Instruments	-	Texas Instruments
Terminal pitch	-	1.27 mm	2.54 mm

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