®
ADC774
Microprocessor-Compatible
ANALOG-TO-DIGITAL CONVERTER
FEATURES
q
COMPLETE 12-BIT A/D CONVERTER WITH
REFERENCE, CLOCK, AND 8-, 12-, or 16-
BIT MICROPROCESSOR BUS INTERFACE
q
ALTERNATE SOURCE FOR HI774 A/D
CONVERTER: 8.5
µ
s Conversion Time,
150ns Bus Access Time
q
FULLY SPECIFIED FOR OPERATION ON
±
12V OR
±
15V SUPPLIES
q
NO MISSING CODES OVER
TEMPERATURE:
0
°
C to +75
°
C: ADC774J, K
–55
°
C to +125
°
C: ADC774SH, TH
formance. It is complete with a self-contained +10V
reference, internal clock, digital interface for micropro-
cessor control, and three-state outputs.
The reference circuit, containing a buried zener, is laser-
trimmed for minimum temperature coefficient. The
clock oscillator is current-controlled for excellent sta-
bility over temperature. Full-scale and offset errors may
be externally trimmed to zero. Internal scaling resistors
are provided for the selection of analog input signal
ranges of 0V to +10V, 0V to +20V,
±5V,
and
±10V.
The converter may be externally programmed to pro-
vide 8- or 12-bit resolution. The conversion time for 12
bits is factory set for 8.5µs maximum.
Output data are available in a parallel format from TTL-
compatible three-state output buffers. Output data are
coded in straight binary for unipolar input signals and
bipolar offset binary for bipolar input signals.
The ADC774, available in both industrial and military
temperature ranges, requires supply voltages of +5V
and
±12V
or
±15V.
It is packaged in a 28-pin plastic
DIP, or a hermetic side-brazed ceramic DIP.
DESCRIPTION
The ADC774 is a 12-bit successive approximation
analog-to-digital converter, utilizing state-of-the-art
CMOS and laser-trimmed bipolar die custom-designed
for freedom from latch-up and for optimum AC per-
Control
Inputs
Control Logic
Status
Bipolar
Offset
20V Range
Clock
Successive
Approximation
Register
10V Range
Reference
Input
Reference
Output
Comparator
12-Bit D/A
Converter
10V
Reference
Three-State Buffers
Parallel
Data
Output
International Airport Industrial Park • Mailing Address: PO Box 11400
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP •
© 1988 Burr-Brown Corporation
• Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
PDS-835E
Printed in U.S.A. March, 1992
SPECIFICATIONS
ELECTRICAL
T
A
= +25°C, V
CC
= +12V or +15V, V
EE
= –12V or –15V, V
LOGIC
= +5V unless otherwise specified.
ADC774J, ADC774SH
PARAMETER
RESOLUTION
INPUTS
ANALOG
Voltage Ranges: Unipolar
Bipolar
Impedance: 0 to +10V,
±5V
±10V,
0V to +20V
DIGITAL
(CE, CS, R/C, A
O
, 12/8)
Over Temperature Range
Voltages: Logic 1
Logic 0
Current
Capacitance
TRANSFER CHARACTERISTICS
ACCURACY
At +25°C
Linearity Error
Unipolar Offset Error (Adjustable to Zero)
Bipolar Offset Error (Adjustable to Zero)
Full-Scale Calibration Error
(1)
(Adjustable to Zero)
No Missing Codes Resolution (Diff. Linearity)
Inherent Quantization Error
T
MIN
to T
MAX
Linearity Error: J, K Grades
S, T Grades
Full-Scale Calibration Error
Without Initial Adjustment
(1)
: J, K Grades
S, T Grades
Adjusted to Zero at +25°C: J, K Grades
S, T Grades
No Missing Codes Resolution (Diff. Linearity)
TEMPERATURE COEFFICIENTS
(T
MIN
to T
MAX
)
(3)
Unipolar Offset: J, K Grades
S, T Grades
Max Change: All Grades
Bipolar Offset: All Grades
Max Change: J, K Grades
S, T Grades
Full-Scale Calibration: J, K Grades
S, T Grades
Max Change: J, K Grades
S, T Grades
POWER SUPPLY SENSITIVITY
Change in Full-Scale Calibration
+13.5V < V
CC
<+16.5V or +11.4V < V
CC
< +12.6V
–16.5V < V
EE
<–13.5V or –12.6V < V
EE
< –11.4V
+4.5V < V
LOGIC
<+5.5V
CONVERSION TIME
(4,5)
8-Bit Cycle
12-Bit Cycle
OUTPUTS
DIGITAL
(DB11 – DB0, STATUS)
(Over Temperature Range)
Output Codes: Unipolar
Bipolar
Logic Levels: Logic 0 (I
SINK
= 1.6mA)
Logic 1 (I
SOURCE
= 500µA)
Leakage, Data Bits Only, High-Z State
Capacitance
5
7.5
MIN
TYP
MAX
12
MIN
ADC774K, ADC774TH
TYP
MAX
*
UNITS
Bits
3.75
7.5
0 to +10, 0 to +20
±5, ±10
5
10
6.25
12.5
*
*
*
*
*
*
*
*
V
V
kΩ
kΩ
+2
–0.5
–5
0.1
5
+5.5
+0.8
+5
*
*
*
*
*
*
*
*
V
V
µA
pF
±1
±2
±10
±0.25
11
±1/2
±1
±1
±0.47
±0.75
±0.22
±0.5
11
±10
±5
±2
±10
±2
±4
±45
±50
±9
±20
12
12
*
±1/2
*
±4
*
LSB
LSB
LSB
% of FS
(2)
Bits
LSB
LSB
LSB
% of FS
% of FS
% of FS
% of FS
Bits
ppm/°C
ppm/°C
LSB
ppm/°C
LSB
LSB
ppm/°C
ppm/°C
LSB
LSB
±1/2
±3/4
±0.37
±0.5
±0.12
±0.25
±5
±2.5
±1
±5
±1
±2
±25
±25
±5
±10
±2
±2
±1/2
5.3
8.5
*
•
±1
±1
*
LSB
LSB
LSB
µs
µs
*
•
+2.4
–5
0.1
5
Unipolar Straight Binary (USB)
Bipolar Offset Binary (BOB)
+0.4
*
+5
*
*
*
*
*
V
V
µA
pF
®
ADC774
2
SPECIFICATIONS
ELECTRICAL
(CONT)
T
A
= +25°C, V
CC
= +12V or +15V, V
EE
= –12V or –15V, V
LOGIC
= +5V unless otherwise specified.
ADC774J, ADC774SH
PARAMETER
INTERNAL REFERENCE VOLRAGE
Voltage
Source Current Available for External Loads
(6)
POWER SUPPLY REQUIREMENTS
Voltage: V
CC
V
EE
V
LOGIC
Current: I
CC
I
EE
I
LOGIC
Power Dissipation (±15V Supplies)
TEMPERATURE RANGE
(Ambient: T
MIN
, T
MAX
)
Specifications: J, K Grades
S, T Grades
Storage
0
–55
–65
+75
+125
+150
*
*
*
*
*
*
°C
°C
°C
+11.4
–11.4
+4.5
3.5
15
9
325
+16.5
–16.5
+5.5
5
20
15
450
*
*
*
*
*
*
*
*
*
*
*
*
*
*
V
V
V
mA
mA
mA
mW
+9.9
2.0
+10
+10.1
*
*
*
*
V
mA
MIN
TYP
MAX
MIN
ADC774K, ADC774TH
TYP
MAX
UNITS
`
*Same specification as ADC774JH, JP, SH.
NOTES: (1) With fixed 50Ω resistor from Ref Out to Ref In. This parameter is also adjustable to zero at +25C. (2) FS in this specification table means Full Scale Range.
That is, for a
±10V
input range FS means 20V; for a 0V to +10V range, FS means 10V. The term Full Scale for these specification instead of Full-Scale Range is used
to be consistent with other vendors' specifications tables. (3) Using internal reference. (4) See “Controlling the ADC774” section for detailed information concerning
digital timing. (5) The Harris HI-774 uses a subranging/error correction technique that allows one to begin conversion before a preceding sample-hold or multiplexer
has settled to
±1/2LSB.
For 12-bit accurate conversions, the input transient to the ADC774 must settle to less than
±1/2LSB
before conversion is started. The ADC774
is compatible with HI-774 in all other respects. (6) External loading must be constant during conversion. The reference output requires no buffer amplifier with either
±12V
or
±15V
power supplies.
PIN CONFIGURATION
Top View
DIP
+5VDC Supply (V
LOGIC
)
12/8
CS
A
O
R/C
CE
+V
CC
Ref Out
Analog Common
Ref In
V
EE
Bipolar Offset
10V Range
20V Range
1
2
Power-up Reset
28
27
Nibble A
STATUS
DB11 (MSB)
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0 (LSB)
Digital Common
3
4
Control
Logic
Three-State Buffers and Control
26
25
24
23
6
7
8
9
10
11
12
13
14
5Ω
10kΩ
5Ω
12-Bit
D/A
Converter
12 Bits
10V
Reference
Successive Approximation Register
5
Clock
12 Bits
Nibble B
22
21
20
19
Nibble C
Comparator
18
17
16
15
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
ADC774
ABSOLUTE MAXIMUM RATINGS
V
CC
to Digital Common ......................................................... 0V to +16.5V
V
EE
to Digital Common .......................................................... 0V to –16.5V
V
LOGIC
Digital Common .............................................................. 0V to +7V
Analog Common to Digital Common ....................................................
±1V
Control Inputs (CE, CS, A
O
, 12/8, R/C)
to Digital Common .............................................. –0.5V to V
LOGIC
+0.5V
Analog Inputs (Ref In, Bipolar Offset, 10V
IN
)
to Analog Common ......................................................................
±16.5V
20V
IN
to Analog Common ..................................................................
±24V
Ref Out .......................................................... Indefinite Short to Common,
Momentary Short to V
CC
Max Junction Temperature ............................................................ +165°C
Power Dissipation ........................................................................ 1000mW
Lead Temperature (soldering,10s) ................................................. +300°C
Thermal Resistance,
θ
JA
: Ceramic ................................................ 50°C/W
Plastic ................................................. 100°C/W
CAUTION: These devices are sensitive to electrostatic discharge.
Appropriate I.C. handling procedures should be followed.
BURN-IN SCREENING
Burn-in screening is available for both plastic and ceramic
package ADC774s. Burn-in duration is 160 hours at the
temperature (or equivalent combination of time and tem-
perature) indicated below:
Plastic “-BI” models: +85°C
Ceramic “-BI” models: +125°C
All units are 100% electrically tested after burn-in is com-
pleted. To order burn-in, add “-BI” to the base model
number (e.g. ADC774KP-BI). See Ordering Information for
pricing.
PACKAGE INFORMATION
MODEL
ADC774JP
ADC774KP
ADC774JH
ADC774KH
ADC774SH
ADC774TH
ADC774JP-BI
ADC774KP-BI
ADC774JH-BI
ADC774KH-BI
ADC774SH-BI
ADC774TH-BI
PACKAGE
28-Pin Plastic DIP
28-Pin Plastic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Plastic DIP
28-Pin Plastic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
28-Pin Ceramic DIP
PACKAGE DRAWING
NUMBER
(1)
215
215
149
149
149
149
215
215
149
149
149
149
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix D of Burr-Brown IC Data Book.
ORDERING INFORMATION
TEMPERATURE
RANGE
0°C TO +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
–55°C to +125°C
–55°C to +125°C
LINEARITY
ERROR MAX
(T
MIN
TO T
MAX
)
±1LSB
±1/2LSB
±1LSB
±1/2LSB
±1LSB
±3/4LSB
MODEL
ADC774JP
ADC774KP
ADC774JH
ADC774KH
ADC774SH
ADC774TH
PACKAGE
Plastic DIP
Plastic DIP
Ceramic DIP
Ceramic DIP
Ceramic DIP
Ceramic DIP
BURN-IN SCREENING OPTION
See text for details.
MODEL
ADC774JP-BI
ADC774KP-BI
ADC774JH-BI
ADC774KH-BI
ADC774SH-BI
ADC774TH-BI
PACKAGE
Plastic DIP
Plastic DIP
Ceramic DIP
Ceramic DIP
Ceramic DIP
Ceramic DIP
TEMPERATURE
RANGE
0°C to +75°C
0°C to +75°C
0°C to +75°C
0°C to +75°C
–55°C to +125°C
–55°C to +125°C
BURN-IN TEMP
(160 HOURS)
(1)
+85°C
+85°C
+125°C
+125°C
+125°C
+125°C
®
ADC774
4
CONTROLLING THE ADC774
This is an abridged data sheet. For Discussion of Specifica-
tions, Installation, Calibration refer to ADC574A data sheet
or order PDS-835.
The Burr-Brown ADC774 can be easily interfaced to most
microprocessor systems and other digital systems. The
microprocessor may take full control of each conversion, or
the converter may operate in a stand-alone mode, controlled
only by the R/C input. Full control consists of selecting an
8- or 12-bit conversion cycle, initiating the conversion, and
reading the output data when ready—choosing either 12 bits
all at once, or 8 bits followed by 4 bits in a left-justified
format. The five control inputs (12/8, CS, A
O
, R/C, and CE)
are all TTL-/CMOS-compatible. The functions of the con-
trol inputs are described in Table I. The control function
truth table is listed in Table II.
Read footnote 5 to the Electrical Specifications table if
using ADC774 to replace the HI-774.
STAND-ALONE OPERATION
For stand-alone operation, control of the converter is ac-
complished by a single control line connected to R/C. In this
mode CS and A
O
are connected to digital common and CE
and 12/8 are connected to V
LOGIC
(+5V). The output data
are presented as 12-bit words. The stand-alone mode is used
in systems containing dedicated input ports which do not
require full bus interface capability.
Conversion is initiated by a high-to-low transition of R/C.
The three-state data output buffers are enabled when R/C is
high and STATUS is low. Thus, there are two possible
modes of operation; conversion can be initiated with either
positive or negative pulses. In either case the R/C pulse
must remain low for a minimum of 50ns.
R/C
t
HRL
t
DS
STS
t
HDR
DB11–DB0
Data Valid
High-Z State
t
C
t
HS
Data Valid
FIGURE 1. R/C Pulse Low—Outputs Enabled After Con-
version.
R/C
t
HRH
t
DS
STS
t
DDR
DB11– High-Z
DB0
t
HDR
Data Valid
t
C
High-Z State
FIGURE 2. R/C Pulse High—Outputs Enabled Only While
R/C Is High.
PIN
DESIGNATION
CE (Pin 6)
CS (Pin 3)
R/C (Pin 5)
DEFINITION
Chip Enable
(active high)
Chip Select
(active low)
Read/Convert
(“1” = read)
(“0” = convert)
Byte Address
Short Cycle
Data Mode Select
(“1” = 12 bits)
(“0” = 8 bits)
FUNCTION
Must be high (“1”) to either initiate a conversion or read output data. 0-1 edge may be used to initiate a
conversion.
Must be low (“0”) to either initiate a conversion or read output data. 1-0 edge may be used to initiate
a conversion.
Must be low (“0”) to initiate either 8- or 12-bit conversions. 1-0 edge may be used to initiate a
conversion. Must be high (“1”) to read output data. 0-1 edge may be used to initiate a read operation.
In the start-convert mode, A
O
selects 8-bit (A
O
= “1”) or 12-bit (A
O
= “0”) conversion mode. When reading
output data in two 8-bit bytes, A
O
= “0” accesses 8 MSBs (high byte) and A
O
= “1” accesses 4 LSBs and
trailing “0s” (low byte).
When reading output data, 12/8 = “1” enables all 12 output bits simultaneously. 12/8 = “0” will enable the
MSBs or LSBs as determined by the A
O
line.
A
O
(Pin 4)
12/8 (Pin 2)
TABLE I. ADC774 Control Line Functions.
CE
0
X
CS
X
1
0
0
R/C
X
X
0
0
0
0
12/8
X
X
X
X
X
X
X
X
1
0
0
A
O
X
X
0
1
0
1
0
1
X
0
1
OPERATION
None
None
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Initiate 12-bit conversion
Initiate 8-bit conversion
Enable 12-bit output
Enable 8 MSBs only
Enable 4 LSBs plus 4
trailing zeros
SYMBOL PARAMETER
t
HRL
t
DS
t
HDR
t
HS
t
HRH
t
DDR
Low R/C Pulse Width
STS Delay from R/C
Data Valid After R/C Low
STS Delay After Data Valid
High R/C Pulse Width
Data Access Time
MIN
50
200
25
150
150
150
375
TYP
MAX
UNITS
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
1
0
0
0
0
0
TABLE III. Stand-Alone Mode Timing.
1
1
1
TABLE II. Control Input Truth Table.
®
5
ADC774
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