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5962F9853501VXC

Description
ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, DFP-16
Categorylogic    logic   
File Size48KB,2 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric Compare View All

5962F9853501VXC Overview

ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, DFP-16

5962F9853501VXC Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDFP
package instructionDFP, FL16,.3
Contacts16
Reach Compliance Codenot_compliant
ECCN codeEAR99
seriesACT
Input adjustmentSTANDARD
JESD-30 codeR-CDFP-F16
JESD-609 codee0
Load capacitance (CL)50 pF
Logic integrated circuit typeOTHER DECODER/DRIVER
MaximumI(ol)0.008 A
Number of functions1
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Output polarityINVERTED
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Encapsulate equivalent codeFL16,.3
Package shapeRECTANGULAR
Package formFLATPACK
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Prop。Delay @ Nom-Sup20 ns
propagation delay (tpd)20 ns
Certification statusNot Qualified
Filter levelMIL-PRF-38535 Class V
Maximum seat height2.92 mm
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
total dose300k Rad(Si) V
width6.73 mm
Base Number Matches1
ACTS138MS
December 1997
Radiation Hardened
TTL Input, 3-to-8 Line Decoder/Demultiplexer
Description
The Radiation Hardened ACTS138MS is an Inverting 3-to-8
Line Decoder/Demultiplexer with three TTL level binary
select inputs (A
0
, A
1
and A
2
). If the device is enabled, these
inputs determine which one of the eight normally high out-
puts will go low.
Two active low and one active high enable inputs (E
1
, E
2
and
E
3
) are provided to make cascaded decoder designs easier
to implement.
The ACTS138MS is fabricated on a CMOS Silicon on Sap-
phire (SOS) process, which provides an immunity to Single
Event Latch-up and the capability of highly reliable perfor-
mance in any radiation environment. These devices offer
significant power reduction and faster performance when
compared to ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACTS138 are
contained in SMD 5962-98535. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm
2
)
• Input Logic Levels . . . . . . . . . . V
IL
= 0.8V, V
IH
= (Vcc/2)
• Output Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . .20µA
• Propagation Delay . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
Applications
• Memory Decoding
• Data Routing
• Code Conversion
Ordering Information
SMD PART NUMBER
5962F9853501VEC
N/A
5962F9853501VXC
N/A
N/A
INTERSIL PART NUMBER
ACTS138DMSR-02
ACTS138D/Sample-02
ACTS138KMSR-02
ACTS138K/Sample-02
ACTS138HMSR-02
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
16 Ld SBDIP
16 Ld SBDIP
16 Ld Flatpack
16 Ld Flatpack
Die
CASE OUTLINE
CDIP2-T16
CDIP2-T16
CDFP4-F16
CDFP4-F16
N/A
Pinouts
ACTS138 (SBDIP)
TOP VIEW
ACTS138 (FLATPACK)
TOP VIEW
A
0
1
A
1
2
A
2
3
E
1
4
E
2
5
E
3
6
Y
7
7
GND 8
16 V
CC
15 Y
0
14 Y
1
13 Y
2
12 Y
3
11 Y
4
10 Y
5
9 Y
6
A
0
A
1
A
2
E
1
E
2
E
3
Y
7
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
Y
0
Y
1
Y
2
Y
3
Y
4
Y
5
Y
6
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
4460
1

5962F9853501VXC Related Products

5962F9853501VXC 5962F9853501VEC
Description ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16, CERAMIC, DFP-16 ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16, SIDE BRAZED, CERAMIC, DIP-16
Is it Rohs certified? incompatible incompatible
Parts packaging code DFP DIP
package instruction DFP, FL16,.3 DIP, DIP16,.3
Contacts 16 16
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
series ACT ACT
Input adjustment STANDARD STANDARD
JESD-30 code R-CDFP-F16 R-CDIP-T16
JESD-609 code e0 e0
Load capacitance (CL) 50 pF 50 pF
Logic integrated circuit type OTHER DECODER/DRIVER OTHER DECODER/DRIVER
MaximumI(ol) 0.008 A 0.008 A
Number of functions 1 1
Number of terminals 16 16
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -55 °C -55 °C
Output polarity INVERTED INVERTED
Package body material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
encapsulated code DFP DIP
Encapsulate equivalent code FL16,.3 DIP16,.3
Package shape RECTANGULAR RECTANGULAR
Package form FLATPACK IN-LINE
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED
power supply 5 V 5 V
Prop。Delay @ Nom-Sup 20 ns 20 ns
propagation delay (tpd) 20 ns 20 ns
Certification status Not Qualified Not Qualified
Filter level MIL-PRF-38535 Class V MIL-PRF-38535 Class V
Maximum seat height 2.92 mm 5.08 mm
Nominal supply voltage (Vsup) 5 V 5 V
surface mount YES NO
technology CMOS CMOS
Temperature level MILITARY MILITARY
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form FLAT THROUGH-HOLE
Terminal pitch 1.27 mm 2.54 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED
total dose 300k Rad(Si) V 300k Rad(Si) V
width 6.73 mm 7.62 mm
Base Number Matches 1 1

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